SNOSDJ3 May   2024 TLV1812-EP

ADVANCE INFORMATION  

  1.   1
  2. 1Features
  3. 2Applications
  4. 3Description
  5.   Pin Configuration and Functions
  6. 4Specifications
    1. 4.1 Absolute Maximum Ratings
    2. 4.2 ESD Ratings
    3. 4.3 Thermal Information - EP
    4. 4.4 Recommended Operating Conditions
    5. 4.5 Electrical Characteristics
    6. 4.6 Switching Characteristics
    7. 4.7 Typical Characteristics
  7. 5Detailed Description
    1. 5.1 Overview
    2. 5.2 Functional Block Diagrams
    3. 5.3 Feature Description
    4. 5.4 Device Functional Modes
      1. 5.4.1 Inputs
        1. 5.4.1.1 TLV18x2-EP Rail-to-Rail Input
        2. 5.4.1.2 ESD Protection
        3. 5.4.1.3 Unused Inputs
      2. 5.4.2 Outputs
        1. 5.4.2.1 TLV1812-EP Push-Pull Output
        2. 5.4.2.2 TLV1822-EP Open-Drain Output
      3. 5.4.3 Power-On Reset (POR)
      4. 5.4.4 Hysteresis
  8. 6Application and Implementation
    1. 6.1 Application Information
      1. 6.1.1 Basic Comparator Definitions
        1. 6.1.1.1 Operation
        2. 6.1.1.2 Propagation Delay
        3. 6.1.1.3 Overdrive Voltage
      2. 6.1.2 Hysteresis
        1. 6.1.2.1 Inverting Comparator With Hysteresis
        2. 6.1.2.2 Non-Inverting Comparator With Hysteresis
        3. 6.1.2.3 Inverting and Non-Inverting Hysteresis using Open-Drain Output
    2. 6.2 Typical Applications
      1. 6.2.1 Window Comparator
        1. 6.2.1.1 Design Requirements
        2. 6.2.1.2 Detailed Design Procedure
        3. 6.2.1.3 Application Curve
      2. 6.2.2 Square-Wave Oscillator
        1. 6.2.2.1 Design Requirements
        2. 6.2.2.2 Detailed Design Procedure
        3. 6.2.2.3 Application Curve
      3. 6.2.3 Adjustable Pulse Width Generator
      4. 6.2.4 Time Delay Generator
      5. 6.2.5 Logic Level Shifter
      6. 6.2.6 One-Shot Multivibrator
      7. 6.2.7 Bi-Stable Multivibrator
      8. 6.2.8 Zero Crossing Detector
      9. 6.2.9 Pulse Slicer
    3. 6.3 Power Supply Recommendations
    4. 6.4 Layout
      1. 6.4.1 Layout Guidelines
      2. 6.4.2 Layout Example
  9. 7Device and Documentation Support
    1. 7.1 Documentation Support
      1. 7.1.1 Related Documentation
    2. 7.2 Receiving Notification of Documentation Updates
    3. 7.3 Support Resources
    4. 7.4 Trademarks
    5. 7.5 Electrostatic Discharge Caution
    6. 7.6 Glossary
  10. 8Revision History
  11. 9Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

5.4.1.2 ESD Protection

The TLV1822-EP open-drain output ESD protection consists of a snapback ESD clamp between the output and V- to allow the output to be pulled above V+ to a maximum of 40V. There is a "lower" ESD clamp between V- and the inputs. There is also a parasitic "upper" ESD soft-clamp diode between the input and V+ with a 5kΩ equivalent resistance (as shown in Figure 5-2). They are not traditional ESD cells thus current must be limited to 1mA or less across the this upper diode and resistance. External diode clamping is recommended if the input voltage may exceed V+ during operation.

The TLV1812-EP push-pull output ESD protection contains a conventional diode-type "upper" ESD clamp between the output and V+, and a "lower" ESD clamp between the output and V-. The output must not exceed the supply rails by more than 200mV.

If the inputs are to be connected to a low impedance source, such as a power supply or buffered reference line, TI recommends adding a current-limiting resistor in series with the input to limit any currents when the clamps conduct. The current must be limited 10mA or less, though TI recommends limiting the current to 1mA or less. This series resistance may be part of any resistive input dividers or networks.