SNOSDC9B October   2022  – September 2023 TLV1811-Q1 , TLV1812-Q1 , TLV1814-Q1 , TLV1821-Q1 , TLV1822-Q1 , TLV1824-Q1

PRODMIX  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Revision History
  6. 5 Pin Configuration and Functions
    1.     Pin Functions: TLV18x1-Q1 and TLV18x1L-Q1
    2.     Pin Functions: TLV1812-Q1 and TLV1822-Q1
    3.     Pin Functions: TLV1814-Q1 and TLV1824-Q1
  7. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information - Single
    5. 6.5 Thermal Information - Dual
    6. 6.6 Thermal Information - Quad
    7. 6.7 Electrical Characteristics
    8. 6.8 Switching Characteristics
  8. 7 Typical Characteristics
  9. 8 Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagrams
    3. 8.3 Feature Description
    4. 8.4 Device Functional Modes
      1. 8.4.1 Inputs
        1. 8.4.1.1 TLV18xx Rail-to-Rail Input
        2. 8.4.1.2 ESD Protection
        3. 8.4.1.3 Unused Inputs
      2. 8.4.2 Outputs
        1. 8.4.2.1 TLV181x-Q1 Push-Pull Output
        2. 8.4.2.2 TLV182x-Q1 Open-Drain Output
      3. 8.4.3 Power-On Reset (POR)
      4. 8.4.4 Hysteresis
  10. 9 Application and Implementation
    1. 9.1 Application Information
      1. 9.1.1 Basic Comparator Definitions
        1. 9.1.1.1 Operation
        2. 9.1.1.2 Propagation Delay
        3. 9.1.1.3 Overdrive Voltage
      2. 9.1.2 Hysteresis
        1. 9.1.2.1 Inverting Comparator With Hysteresis
        2. 9.1.2.2 Non-Inverting Comparator With Hysteresis
        3. 9.1.2.3 Inverting and Non-Inverting Hysteresis using Open-Drain Output
    2. 9.2 Typical Applications
      1. 9.2.1 Window Comparator
        1. 9.2.1.1 Design Requirements
        2. 9.2.1.2 Detailed Design Procedure
        3. 9.2.1.3 Application Curve
      2. 9.2.2 Square-Wave Oscillator
        1. 9.2.2.1 Design Requirements
        2. 9.2.2.2 Detailed Design Procedure
        3. 9.2.2.3 Application Curve
      3. 9.2.3 Adjustable Pulse Width Generator
      4. 9.2.4 Time Delay Generator
      5. 9.2.5 Logic Level Shifter
      6. 9.2.6 One-Shot Multivibrator
      7. 9.2.7 Bi-Stable Multivibrator
      8. 9.2.8 Zero Crossing Detector
      9. 9.2.9 Pulse Slicer
    3. 9.3 Power Supply Recommendations
    4. 9.4 Layout
      1. 9.4.1 Layout Guidelines
      2. 9.4.2 Layout Example
  11. 10Device and Documentation Support
    1. 10.1 Documentation Support
      1. 10.1.1 Related Documentation
    2. 10.2 Receiving Notification of Documentation Updates
    3. 10.3 Support Resources
    4. 10.4 Trademarks
    5. 10.5 Electrostatic Discharge Caution
    6. 10.6 Glossary
  12. 11Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

Pin Functions: TLV1814-Q1 and TLV1824-Q1

GUID-20200930-CA0I-FCB5-TBJR-28LG0TRKXTL6-low.gifD, PW, DYY Package, 14-Pin SOIC, TSSOP, SOT-23, Top View
GUID-20200930-CA0I-LTWS-Q7NC-TQKNK3K16KZS-low.gif
NOTE: Connect exposed thermal pad directly to V- pin.
RTE Package, 16-Pad WQFN With Exposed Thermal Pad, Top View
Table 5-3 Pin Functions: TLV1814-Q1 and TLV1824-Q1
PIN I/O DESCRIPTION
NAME SOIC WQFN
OUT2(1) 1 15

O

 Output pin of the comparator 2
OUT1(1) 2 16 O Output pin of the comparator1

V+

 3 1 — Positive supply
IN1– 4 2 I Negative input pin of the comparator 1
IN1+ 5 4 I Positive input pin of the comparator 1
IN2– 6 5 I Negative input pin of the comparator 2
IN2+ 7 6 I Positive input pin of the comparator 2
IN3– 8 7 I Negative input pin of the comparator 3
IN3+ 9 8 I Positive input pin of the comparator 3
IN4– 10 9 I Negative input pin of the comparator 4
IN4+ 11 11 I Positive input pin of the comparator 4
V- 12 12 — Negative supply
OUT4 13 13 O Output pin of the comparator 4
OUT3 14 14 O Output pin of the comparator 3
NC — 3 — No Internal Connection - Leave floating or GND
NC — 10 — No Internal Connection - Leave floating or GND
Thermal Pad — PAD — Connect directly to V- pin.
(1) Some manufacturers transpose the names of channels 1 and 2. Electrically the pinouts are identical, just a difference in channel naming convention.