SNOSDC9B October   2022  – September 2023 TLV1811-Q1 , TLV1812-Q1 , TLV1814-Q1 , TLV1821-Q1 , TLV1822-Q1 , TLV1824-Q1

PRODMIX  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Revision History
  6. 5 Pin Configuration and Functions
    1.     Pin Functions: TLV18x1-Q1 and TLV18x1L-Q1
    2.     Pin Functions: TLV1812-Q1 and TLV1822-Q1
    3.     Pin Functions: TLV1814-Q1 and TLV1824-Q1
  7. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information - Single
    5. 6.5 Thermal Information - Dual
    6. 6.6 Thermal Information - Quad
    7. 6.7 Electrical Characteristics
    8. 6.8 Switching Characteristics
  8. 7 Typical Characteristics
  9. 8 Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagrams
    3. 8.3 Feature Description
    4. 8.4 Device Functional Modes
      1. 8.4.1 Inputs
        1. 8.4.1.1 TLV18xx Rail-to-Rail Input
        2. 8.4.1.2 ESD Protection
        3. 8.4.1.3 Unused Inputs
      2. 8.4.2 Outputs
        1. 8.4.2.1 TLV181x-Q1 Push-Pull Output
        2. 8.4.2.2 TLV182x-Q1 Open-Drain Output
      3. 8.4.3 Power-On Reset (POR)
      4. 8.4.4 Hysteresis
  10. 9 Application and Implementation
    1. 9.1 Application Information
      1. 9.1.1 Basic Comparator Definitions
        1. 9.1.1.1 Operation
        2. 9.1.1.2 Propagation Delay
        3. 9.1.1.3 Overdrive Voltage
      2. 9.1.2 Hysteresis
        1. 9.1.2.1 Inverting Comparator With Hysteresis
        2. 9.1.2.2 Non-Inverting Comparator With Hysteresis
        3. 9.1.2.3 Inverting and Non-Inverting Hysteresis using Open-Drain Output
    2. 9.2 Typical Applications
      1. 9.2.1 Window Comparator
        1. 9.2.1.1 Design Requirements
        2. 9.2.1.2 Detailed Design Procedure
        3. 9.2.1.3 Application Curve
      2. 9.2.2 Square-Wave Oscillator
        1. 9.2.2.1 Design Requirements
        2. 9.2.2.2 Detailed Design Procedure
        3. 9.2.2.3 Application Curve
      3. 9.2.3 Adjustable Pulse Width Generator
      4. 9.2.4 Time Delay Generator
      5. 9.2.5 Logic Level Shifter
      6. 9.2.6 One-Shot Multivibrator
      7. 9.2.7 Bi-Stable Multivibrator
      8. 9.2.8 Zero Crossing Detector
      9. 9.2.9 Pulse Slicer
    3. 9.3 Power Supply Recommendations
    4. 9.4 Layout
      1. 9.4.1 Layout Guidelines
      2. 9.4.2 Layout Example
  11. 10Device and Documentation Support
    1. 10.1 Documentation Support
      1. 10.1.1 Related Documentation
    2. 10.2 Receiving Notification of Documentation Updates
    3. 10.3 Support Resources
    4. 10.4 Trademarks
    5. 10.5 Electrostatic Discharge Caution
    6. 10.6 Glossary
  12. 11Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

6.5 Thermal Information - Dual

THERMAL METRIC(1) TLV18x2-Q1 UNIT
D (SOIC) PW (TSSOP) DDF (SOT-23) DSG (WSON) DGK (VSSOP)
8 PINS 8 PINS 8 PINS 8 PINS 8 PINS
RθJA Junction-to-ambient thermal resistance 136.1 187.5 170.4 79.9 178.3 °C/W
RθJC(top) Junction-to-case (top) thermal resistance 76.8 76.7 90.3 100.1 66.4 °C/W
RθJB Junction-to-board thermal resistance 79.7 118.1 88.1 46.4 100.0 °C/W
ψJT Junction-to-top characterization parameter 26.8 14.4 7.5 5.3 9.2 °C/W
ψJB Junction-to-board characterization parameter 78.9 116.4 87.6 46.4 98.3 °C/W
RθJC(bot) Junction-to-case (bottom) thermal resistance – – – 21.6 – °C/W
(1) For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics report.