SNOSDF2 august   2023 TLV1851-Q1 , TLV1861-Q1

PRODMIX  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Revision History
  6. 5 Pin Configuration and Functions
    1.     Pin Configuration: TLV1851-Q1 and TLV1861-Q1
    2.     Pin Configurations: TLV1852-Q1 and TLV1862-Q1
    3.     Pin Configurations: TLV1854-Q1 and TLV1864-Q1
  7. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Thermal Information
    4. 6.4 Recommended Operating Conditions
    5. 6.5 Electrical Characteristics
    6. 6.6 Switching Characteristics
    7. 6.7 Typical Characteristics
  8. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagrams
    3. 7.3 Feature Description
    4. 7.4 Device Functional Modes
      1. 7.4.1 Inputs
        1. 7.4.1.1 Operating Common-Mode Ranges
        2. 7.4.1.2 Fail-Safe Inputs
        3. 7.4.1.3 Unused Inputs
      2. 7.4.2 Internal Hysteresis
      3. 7.4.3 Outputs
        1. 7.4.3.1 TLV185x-Q1 Push-Pull Output
        2. 7.4.3.2 TLV186x-Q1 Open-Drain Output
      4. 7.4.4 ESD Protection
        1. 7.4.4.1 Inputs
        2. 7.4.4.2 Outputs
      5. 7.4.5 Power-On Reset (POR)
      6. 7.4.6 Reverse Battery Protection
  9. 8 Application and Implementation
    1. 8.1 Application Information
      1. 8.1.1 Basic Comparator Definitions
        1. 8.1.1.1 Operation
        2. 8.1.1.2 Propagation Delay
        3. 8.1.1.3 Overdrive Voltage
      2. 8.1.2 Hysteresis
        1. 8.1.2.1 Inverting Comparator With Hysteresis
        2. 8.1.2.2 Non-Inverting Comparator With Hysteresis
        3. 8.1.2.3 Inverting and Non-Inverting Hysteresis using Open-Drain Output
    2. 8.2 Typical Applications
      1. 8.2.1 Window Comparator
        1. 8.2.1.1 Design Requirements
        2. 8.2.1.2 Detailed Design Procedure
        3. 8.2.1.3 Application Curve
      2. 8.2.2 Undervoltage Detection
      3. 8.2.3 Reverse Battery and Overvoltage Protection Scheme
    3. 8.3 Power Supply Recommendations
  10. 9 Layout
    1. 9.1 Layout Guidelines
    2. 9.2 Layout Example
  11. 10Device and Documentation Support
    1. 10.1 Documentation Support
      1. 10.1.1 Related Documentation
    2. 10.2 Receiving Notification of Documentation Updates
    3. 10.3 Support Resources
    4. 10.4 Trademarks
    5. 10.5 Electrostatic Discharge Caution
    6. 10.6 Glossary
  12. 11Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

6.6 Switching Characteristics

For VS  = (V+) – (V–) = 12 V, VCM = VS / 2 at TA = 25°C (Unless otherwise noted)
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
OUTPUT
TPD-HL Propagation delay time, high-to-low VOD = 10 mV, CL = 25 pF, VSTEP = 100 mV 45 µs
VOD = 50mV, CL = 25 pF, VSTEP = 100 mV 16 µs
VOD = 100mV, CL = 25 pF, VSTEP = 200 mV 13 µs
TPD-LH Propagation delay time, low-to-high (Push-Pull output) VOD = 10 mV, CL = 10 pF, VSTEP = 100 mV 34 µs
TPD-LH Propagation delay time, low-to-high (Push-Pull output) VOD = 50 mV, CL = 10 pF, VSTEP = 100 mV 16 µs
TPD-LH Propagation delay time, low-to-high (Push-Pull output) VOD = 100 mV, CL = 10 pF, VSTEP = 200 mV 14 µs
TPD-LH Propagation delay time, low-to-high (Open-Drain output) VOD = 10 mV, CL = 25 pF, RP = 1 MΩ, VSTEP = 100 mV 57 µs
VOD = 50 mV, CL = 25 pF, RP = 1 MΩ, VSTEP = 100 mV 36 µs
VOD = 100 mV, CL = 25 pF, RP = 1 MΩ, VSTEP = 200 mV 35 µs
TRISE Output Rise Time, 20% to 80%, push-pull output CL = 25 pF 0.2 µs
TFALL Output Fall Time, 80% to 20% CL = 25 pF 0.2 µs
POWER ON TIME
TON Power on-time 3 ms