Accurate comparator applications must maintain a stable power supply with minimized noise and glitches. Output rise and fall times are in the tens of nanoseconds, and must be treated as high speed logic devices.

The bypass capacitors must be as close to the supply pin as possible and connected to a solid ground plane, and preferably directly between the VCCx or VEEx and GND pins. Pads need have two or more vias to minimize inductance to the power plane. Shared ground islands need multiple vias to the main ground plane.

Minimize coupling between outputs and inputs to prevent output oscillations. Do not run output and input traces in parallel unless there is a GND trace between output to reduce coupling. When series resistance is added to inputs (RIN), place resistor close to the device.

A low value (<100 ohms) resistor (ROUT) can be added in series with the output to dampen any ringing or reflections on long, non-impedance controlled traces. For best edge shapes, controlled impedance traces with back-terminations must be used when routing long distances.