SNOSDI4A March   2024  – December 2024 TLV1871 , TLV1872

PRODMIX  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Pin Configuration and Functions
    1. 4.1 Pin Configurations: TLV1871 Single
    2.     Pin Configurations: TLV1872 Dual
  6. 5 Specifications
    1. 5.1 Absolute Maximum Ratings
    2. 5.2 ESD Ratings
    3. 5.3 Thermal Information
    4. 5.4 Recommended Operating Conditions
    5. 5.5 Electrical Characteristics
    6. 5.6 Switching Characteristics
    7. 5.7 Typical Characteristics
  7. 6 Detailed Description
    1. 6.1 Overview
    2. 6.2 Functional Block Diagram
    3. 6.3 Feature Description
    4. 6.4 Device Functional Modes
      1. 6.4.1 Separate Power Supplies
      2. 6.4.2 Power-On Reset (POR)
      3. 6.4.3 Inputs
        1. 6.4.3.1 Rail-to-Rail Inputs
        2. 6.4.3.2 Unused Inputs
      4. 6.4.4 Push-Pull Output
      5. 6.4.5 ESD Protection
  8. 7 Application and Implementation
    1. 7.1 Application Information
      1. 7.1.1 Basic Comparator Definitions
        1. 7.1.1.1 Operation
        2. 7.1.1.2 Propagation Delay
        3. 7.1.1.3 Overdrive Voltage
      2. 7.1.2 Hysteresis
    2. 7.2 Typical Applications
      1. 7.2.1 Accurate Bipolar Zero-Cross Detector
        1. 7.2.1.1 Design Requirements
        2. 7.2.1.2 Detailed Design Procedure
        3. 7.2.1.3 Application Performance Plots
    3. 7.3 Power Supply Recommendations
    4. 7.4 Layout
      1. 7.4.1 Layout Guidelines
      2. 7.4.2 Layout Example
  9. 8 Device and Documentation Support
    1. 8.1 Documentation Support
      1. 8.1.1 Related Documentation
    2. 8.2 Receiving Notification of Documentation Updates
    3. 8.3 Support Resources
    4. 8.4 Trademarks
    5. 8.5 Electrostatic Discharge Caution
    6. 8.6 Glossary
  10. 9 Revision History
  11. 10Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

6.3 Feature Description

The TLV187x (push-pull output) devices are high speed comparators with a typical propagation delay of 65ns and are capable of operating at voltages up to 40V. The separate input and output supplies make these comparators well-suited for applications that need bipolar signals to be level shifted to low voltage logic devices. This also eliminates the need for a pull-up resistor and offers propagation delay and edge-rate symmetry. These comparators also feature a rail-to-rail input stage capable of operating up to 200mV beyond the power supply rails combined with a maximum 2.5mV input offset and Power-On Reset (POR) for known start-up conditions.