SNOSDI4A March   2024  – December 2024 TLV1871 , TLV1872

PRODMIX  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Pin Configuration and Functions
    1. 4.1 Pin Configurations: TLV1871 Single
    2.     Pin Configurations: TLV1872 Dual
  6. 5 Specifications
    1. 5.1 Absolute Maximum Ratings
    2. 5.2 ESD Ratings
    3. 5.3 Thermal Information
    4. 5.4 Recommended Operating Conditions
    5. 5.5 Electrical Characteristics
    6. 5.6 Switching Characteristics
    7. 5.7 Typical Characteristics
  7. 6 Detailed Description
    1. 6.1 Overview
    2. 6.2 Functional Block Diagram
    3. 6.3 Feature Description
    4. 6.4 Device Functional Modes
      1. 6.4.1 Separate Power Supplies
      2. 6.4.2 Power-On Reset (POR)
      3. 6.4.3 Inputs
        1. 6.4.3.1 Rail-to-Rail Inputs
        2. 6.4.3.2 Unused Inputs
      4. 6.4.4 Push-Pull Output
      5. 6.4.5 ESD Protection
  8. 7 Application and Implementation
    1. 7.1 Application Information
      1. 7.1.1 Basic Comparator Definitions
        1. 7.1.1.1 Operation
        2. 7.1.1.2 Propagation Delay
        3. 7.1.1.3 Overdrive Voltage
      2. 7.1.2 Hysteresis
    2. 7.2 Typical Applications
      1. 7.2.1 Accurate Bipolar Zero-Cross Detector
        1. 7.2.1.1 Design Requirements
        2. 7.2.1.2 Detailed Design Procedure
        3. 7.2.1.3 Application Performance Plots
    3. 7.3 Power Supply Recommendations
    4. 7.4 Layout
      1. 7.4.1 Layout Guidelines
      2. 7.4.2 Layout Example
  9. 8 Device and Documentation Support
    1. 8.1 Documentation Support
      1. 8.1.1 Related Documentation
    2. 8.2 Receiving Notification of Documentation Updates
    3. 8.3 Support Resources
    4. 8.4 Trademarks
    5. 8.5 Electrostatic Discharge Caution
    6. 8.6 Glossary
  10. 9 Revision History
  11. 10Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

6.4.2 Power-On Reset (POR)

The TLV187x devices have an internal Power-on-Reset (POR) circuit for known start-up or power-down conditions. While the power supplies are ramping up, the POR circuitry is activated for up to 80µs after the VPOR threshold of 1.7V is crossed.

The TLV187x Output is High Impedance ("Hi-Z") During the POR Period (ton).

The input and output POR thresholds are "AND'ed" together. When BOTH the input supply (VCCI-VEEI) AND the output supply (VCCO - VEEO) are greater than the VPOR voltage, then after a delay period (tON), the comparator output reflects the state of the differential input (VID).

TLV1871 TLV1872 Power-On Reset Timing Diagram Figure 6-3 Power-On Reset Timing Diagram

There is no delay on power down. The output enters the POR state immediately when both the supplies fall below VPOR.