SNOSDI4A March   2024  – December 2024 TLV1871 , TLV1872

PRODMIX  

  1.   1
  2. Features
  3. Applications
  4. Description
  5. Pin Configuration and Functions
    1. 4.1 Pin Configurations: TLV1871 Single
    2.     Pin Configurations: TLV1872 Dual
  6. Specifications
    1. 5.1 Absolute Maximum Ratings
    2. 5.2 ESD Ratings
    3. 5.3 Thermal Information
    4. 5.4 Recommended Operating Conditions
    5. 5.5 Electrical Characteristics
    6. 5.6 Switching Characteristics
    7. 5.7 Typical Characteristics
  7. Detailed Description
    1. 6.1 Overview
    2. 6.2 Functional Block Diagram
    3. 6.3 Feature Description
    4. 6.4 Device Functional Modes
      1. 6.4.1 Separate Power Supplies
      2. 6.4.2 Power-On Reset (POR)
      3. 6.4.3 Inputs
        1. 6.4.3.1 Rail-to-Rail Inputs
        2. 6.4.3.2 Unused Inputs
      4. 6.4.4 Push-Pull Output
      5. 6.4.5 ESD Protection
  8. Application and Implementation
    1. 7.1 Application Information
      1. 7.1.1 Basic Comparator Definitions
        1. 7.1.1.1 Operation
        2. 7.1.1.2 Propagation Delay
        3. 7.1.1.3 Overdrive Voltage
      2. 7.1.2 Hysteresis
    2. 7.2 Typical Applications
      1. 7.2.1 Accurate Bipolar Zero-Cross Detector
        1. 7.2.1.1 Design Requirements
        2. 7.2.1.2 Detailed Design Procedure
        3. 7.2.1.3 Application Performance Plots
    3. 7.3 Power Supply Recommendations
    4. 7.4 Layout
      1. 7.4.1 Layout Guidelines
      2. 7.4.2 Layout Example
  9. Device and Documentation Support
    1. 8.1 Documentation Support
      1. 8.1.1 Related Documentation
    2. 8.2 Receiving Notification of Documentation Updates
    3. 8.3 Support Resources
    4. 8.4 Trademarks
    5. 8.5 Electrostatic Discharge Caution
    6. 8.6 Glossary
  10. Revision History
  11. 10Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

Electrical Characteristics


For VCCI = 12V, VEEI = 0V, VCCO = 3.3V, VEEO = 0V, VCM = 0V at TA = 25°C (Unless otherwise noted)
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
OFFSET VOLTAGE
VOS Input offset voltage TA = 25°C –2.5 ±0.3 2.5 mV
VOS Input offset voltage TA = –40°C to +125°C –3.0 3.0 mV
dVIO/dT Input offset voltage drift TA = –40°C to +125°C ±1.2 µV/°C
POWER SUPPLY
IQ Quiescent current per comparator (2) No Load, Output High TA =  25°C 75 100 µA
No Load, Output High TA = –40°C to +125°C 105 µA
No Load, Output Low TA =  25°C 100 135 µA
No Load, Output Low TA = –40°C to +125°C 140 µA
VPOR 1.9 V
INPUT BIAS CURRENT
IB Input bias current (1) 500 pA
IB Input bias current (1) (3) TA = –40°C to +125°C -5 5 nA
IOS Input offset current 10 pA
INPUT CAPACITANCE
CID Input Capacitance, Differential 5 pF
CIC Input Capacitance, Common Mode 5 pF
INPUT COMMON MODE RANGE
VCM-Range Common-mode voltage range VCCI - VEEI = 2.7V to 36V
TA = –40°C to +125°C
VEEI – 0.2 VCCI + 0.2 V
OUTPUT
VOL Voltage swing from (VEEO) ISINK = 4mA
TA = –40°C to +125°C
300 mV
VOH Voltage swing from (VCCO ISOURCE = 4mA
TA = –40°C to +125°C
300 mV
IOL Short-circuit current Sinking
TA = –40°C to +125°C
30 mA
IOH Short-circuit current Sourcing
TA = –40°C to +125°C
30 mA
Please see figure for IBIAS vs VID performance curve
Current shown is the sum of the current through VCCI and VCCO. Please see Supply Current graphs in Typical Characteristics section.
This parameter is assured by design and/or characterization and is not tested in production.