SNOSDG0 August   2024 TLV1H103-SEP

PRODUCTION DATA  

  1.   1
  2. Features
  3. Applications
  4. Description
  5. Pin Configuration and Functions
  6. Specifications
    1. 5.1 Absolute Maximum Ratings
    2. 5.2 ESD Ratings
    3. 5.3 Recommended Operating Conditions
    4. 5.4 Thermal Information
    5. 5.5 Electrical Characteristics
    6. 5.6 Timing Diagrams
    7. 5.7 Typical Characteristics
  7. Detailed Description
    1. 6.1 Overview
    2. 6.2 Functional Block Diagram
    3. 6.3 Feature Description
    4. 6.4 Device Functional Modes
      1. 6.4.1 Inputs
      2. 6.4.2 Push-Pull (Single-Ended) Output
      3. 6.4.3 Known Startup Condition
  8. Application and Implementation
    1. 7.1 Application Information
      1. 7.1.1 Adjustable Hysteresis
      2. 7.1.2 Capacitive Loads
      3. 7.1.3 Latch Functionality
    2. 7.2 Typical Application
      1. 7.2.1 Implementing Adjustable Hystseresis
        1. 7.2.1.1 Design Requirements
        2. 7.2.1.2 Detailed Design Procedure
        3. 7.2.1.3 Application Curve
      2. 7.2.2 Optical Receiver
      3. 7.2.3 Over-Current Latch Condition
      4. 7.2.4 External Trigger Function
    3. 7.3 Power Supply Recommendations
    4. 7.4 Layout
      1. 7.4.1 Layout Guidelines
      2. 7.4.2 Layout Example
  9. Documentation Support
    1. 8.1 Related Documentation
      1. 8.1.1 Development Support
    2. 8.2 Receiving Notification of Documentation Updates
    3. 8.3 Support Resources
    4. 8.4 Trademarks
    5. 8.5 Electrostatic Discharge Caution
    6. 8.6 Glossary
  10. Revision History
  11. 10Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

Adjustable Hysteresis

As a result of a comparator’s high open loop gain, there is a small band of input differential voltage where the output can toggle back and forth between “logic high” and “logic low” states. This can cause design challenges for inputs with slow rise and fall times or systems with excessive noise. These challenges can be overcome by adding hysteresis to the comparator.

The TLV1H103-SEP has a LE/HYS pin that can be used to increase the internal hysteresis of the comparator. To change the internal hysteresis of the comparator, connect a single resistor as shown in the adjusting hysteresis figure between the LE/HYS pin and VEE. A curve of hysteresis versus resistance is provided below to provide guidance in setting the desired amount of hysteresis.

TLV1H103-SEP Adjustable Hysteresis using External
                        ResistorFigure 7-1 Adjustable Hysteresis using External Resistor
TLV1H103-SEP Adjustable Hysteresis using External VoltageFigure 7-2 Adjustable Hysteresis using External Voltage
TLV1H103-SEP Hysteresis vs. RHYS at VCC = 5VFigure 7-3 Hysteresis vs. RHYS at VCC = 5V
TLV1H103-SEP Hysteresis vs. VHYS at VCC = 5VFigure 7-4 Hysteresis vs. VHYS at VCC = 5V

To provide adjustable hysteresis, an external 0.7V to 1.2V voltage, such as from a DAC, can be forced into the LE/HYST pin, as shown in Figure 7-2 and Figure 7-4. The LE/HYST pin can be internally modeled as a 40k resistor in series with a 1.25V source to VEE, so any driving circuitry must be able to sink up to 32uA. Note that the output goes into latch when LE/HYST is ≤ 400mV, or go into shutdown when ≥ 1.25V.