SBOS947A July   2019  – June 2020 TLV2186

PRODUCTION DATA.  

  1. Features
  2. Applications
  3. Description
    1.     Device Images
      1.      High-Side Current Shunt Monitor Application
      2.      VOS vs Input Common Mode Voltage
  4. Revision History
  5. Pin Configuration and Functions
    1.     Pin Functions
  6. Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Typical Characteristics
  7. Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Rail-to-Rail Inputs
      2. 7.3.2 Phase-Reversal Protection
      3. 7.3.3 Input Bias Current Clock Feedthrough
      4. 7.3.4 EMI Rejection
        1. 7.3.4.1 EMIRR +IN Test Configuration
      5. 7.3.5 Electrical Overstress
      6. 7.3.6 MUX-Friendly Inputs
    4. 7.4 Device Functional Modes
  8. Application and Implementation
    1. 8.1 Application Information
      1. 8.1.1 Basic Noise Calculations
    2. 8.2 Typical Applications
      1. 8.2.1 High-Side Current Sensing
        1. 8.2.1.1 Design Requirements
        2. 8.2.1.2 Detailed Design Procedure
        3. 8.2.1.3 Application Curve
      2. 8.2.2 Bridge Amplifier
      3. 8.2.3 Low-Side Current Monitor
      4. 8.2.4 RTD Amplifier With Linearization
  9. Power Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Example
  11. 11Device and Documentation Support
    1. 11.1 Device Support
      1. 11.1.1 Development Support
        1. 11.1.1.1 TINA-TI (Free Software Download)
        2. 11.1.1.2 TI Precision Designs
    2. 11.2 Documentation Support
      1. 11.2.1 Related Documentation
    3. 11.3 Receiving Notification of Documentation Updates
    4. 11.4 Support Resources
    5. 11.5 Trademarks
    6. 11.6 Electrostatic Discharge Caution
    7. 11.7 Glossary
  12. 12Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

Electrical Characteristics

at TA = 25°C, VS = ±2.25V to ±12V, RL = 10 kΩ connected to VS / 2, VCM = VS / 2, and VOUT = VS / 2 (unless otherwise noted)
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
OFFSET VOLTAGE
VOS Input offset voltage ±10 ±250 μV
dVOS/dT Input offset voltage drift TA = –40°C to +125°C ±0.1 ±1.0 μV/°C
PSRR Power-supply rejection ratio TA = –40°C to +125°C ±0.05 ±1 μV/V
INPUT BIAS CURRENT
IB Input bias current 0.1 0.6 nA
TA = –40℃ to +85℃ 0.6
TA = –40℃ to +125℃ 5
IOS Input offset current 0.1 1.2 nA
TA = –40℃ to +85℃ 1.2
TA = –40℃ to +125℃ 2
NOISE
Input voltage noise f = 0.1 Hz to 10 Hz 110 nVRMS
eN Input voltage noise density f = 1 kHz 38 nV/√Hz
iN Input current noise f = 1 kHz 100 fA/√Hz
INPUT VOLTAGE
VCM Common-mode voltage (V–) – 0.2 (V+) + 0.2 V
CMRR Common-mode rejection ratio (V–) – 0.1 < VCM < (V+) + 0.1 V, TA = –40℃ to +125℃ VS = ±2.25 V 108 126 dB
VS = ±12 V 110 134
(V–) – 0.1 < VCM < (V+) + 0.1 V, TA = –40℃ to +125℃ VS = ±2.25 V 106 114
VS = ±12 V 106 120
FREQUENCY RESPONSE
GBW Gain-bandwidth product 750 kHz
SR Slew rate 1-V step, G = 1 0.35 V/μs
tS Settling time To 0.1%, 1-V step , G = 1 7.5 μs
Overload recovery time VIN  × gain > VS 10 μs
INPUT CAPACITANCE
ZID Differential 100 || 5 MΩ || pF
ZICM Common-mode 50 || 2.5 GΩ || pF
OPEN-LOOP GAIN
AOL Open-loop voltage gain VS = ±12 V (V–) + 0.3 V < VO < (V+) – 0.3 V, RL = 10 kΩ 120 140 dB
(V–) + 0.3 V < VO < (V+) – 0.3 V, RL = 10 kΩ, TA = –40°C to +125°C 120 134
(V–) + 0.65 V < VO < (V+) – 0.65 V, RL = 2 kΩ 120 140
(V–) + 0.65 V < VO < (V+) – 0.65 V, RL = 2 kΩ, TA = –40°C to +125°C 120 134
OUTPUT
VO Voltage output swing from both rails No load 5 20 mV
RL = 10 kΩ 60 100
RL = 2 kΩ 340 500
RL = 10 kΩ, TA = –40℃ to +125℃ 90 115
ISC Short-circuit current ±20 mA
CLOAD Capacitive load drive See typical curves
RO Open-loop output impedance See typical curves
POWER SUPPLY
IQ Quiescent current per amplifier VS = ±2.25 to  ±12 V 90 130 µA
TA = –40°C to +125°C 150