SBOS837A November   2016  – January 2019 TLV2314-Q1 , TLV314-Q1 , TLV4314-Q1

PRODUCTION DATA.  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
    1.     Device Images
      1.      EMIRR vs Frequency
  4. 4 Revision History
  5. 5 Pin Configuration and Functions
    1.     Pin Functions: TLV314-Q1
    2.     Pin Functions: TLV2314-Q1
    3.     Pin Functions: TLV4314-Q1
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information: TLV314-Q1
    5. 6.5 Thermal Information: TLV2314-Q1
    6. 6.6 Thermal Information: TLV4314-Q1
    7. 6.7 Electrical Characteristics
    8. 6.8 Typical Characteristics
    9. 6.9 Typical Characteristics
  7. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Operating Voltage
      2. 7.3.2 Rail-to-Rail Input
      3. 7.3.3 Rail-to-Rail Output
      4. 7.3.4 Common-Mode Rejection Ratio (CMRR)
      5. 7.3.5 Capacitive Load and Stability
      6. 7.3.6 EMI Susceptibility and Input Filtering
    4. 7.4 Device Functional Modes
  8. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
      3. 8.2.3 Application Curve
    3. 8.3 System Examples
  9. 9 Power Supply Recommendations
    1. 9.1 Input and ESD Protection
  10. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Example
  11. 11Device and Documentation Support
    1. 11.1 Device Support
      1. 11.1.1 Development Support
    2. 11.2 Documentation Support
      1. 11.2.1 Related Documentation
    3. 11.3 Related Links
    4. 11.4 Community Resources
    5. 11.5 Trademarks
    6. 11.6 Electrostatic Discharge Caution
    7. 11.7 Glossary
  12. 12Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

6.7 Electrical Characteristics

VS = 1.8 V to 5.5 V; at TA = 25°C, RL = 10 kΩ connected to VS / 2, VCM = VS / 2, and VOUT = VS / 2 (unless otherwise noted)(1)
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
OFFSET VOLTAGE
VOS Input offset voltage VCM = (VS+) – 1.3 V, TA = 25°C ±0.75 ±3 mV
dVOS/dT VOS vs temperature TA = –40°C to +125°C 2 μV/°C
PSRR Power-supply rejection ratio VCM = (VS+) – 1.3 V, TA = 25°C ±30 ±135 µV/V
Channel separation, dc At dc, TA = 25°C 100 dB
INPUT VOLTAGE RANGE
VCM Common-mode voltage range TA = 25°C (V–) – 0.2 (V+) + 0.2 V
CMRR Common-mode rejection ratio VS = 5.5 V, (VS–) – 0.2 V < VCM < (VS+) – 1.3 V,
TA = 25°C		 72 96 dB
VS = 5.5 V, VCM = –0.2 V to 5.7 V(2), TA = 25°C 75
INPUT BIAS CURRENT
IB Input bias current TA = 25°C ±1.0 pA
IOS Input offset current TA = 25°C ±1.0 pA
NOISE
Input voltage noise (peak-to-peak) ƒ = 0.1 Hz to 10 Hz, TA = 25°C 5 μVPP
en Input voltage noise density ƒ = 10 kHz, TA = 25°C 15 nV/√Hz
ƒ = 1 kHz, TA = 25°C 16
in Input current noise density ƒ = 1 kHz, TA = 25°C 6 fA/√Hz
INPUT CAPACITANCE
CIN Input capacitance Differential VS = 5 V, TA = 25°C 1 pF
Common-mode VS = 5 V, TA = 25°C 5
OPEN-LOOP GAIN
AOL Open-loop voltage gain VS = 1.8 V to 5.5 V, 0.2 V < VO < (V+) – 0.2 V,
RL = 10 kΩ, TA = 25°C		 85 115 dB
VS = 1.8 V to 5.5 V, 0.5 V < VO < (V+) – 0.5 V,
RL = 2 kΩ(2), TA = 25°C		 85 100
Phase margin VS = 5 V, G = 1, RL = 10 kΩ, TA = 25°C 65 °
FREQUENCY RESPONSE
GBW Gain-bandwidth product VS = 1.8 V, RL = 10 kΩ, CL = 10 pF, TA = 25°C 2.7 MHz
VS = 5 V, RL = 10 kΩ, CL = 10 pF, TA = 25°C 3
SR Slew rate(3) VS = 5 V, G = 1, TA = 25°C 1.5 V/μs
tS Settling time To 0.1%, VS = 5 V, 2-V step , G = 1, TA = 25°C 3 μs
Overload recovery time VS = 5 V, VIN  × gain > VS, TA = 25°C 8 μs
THD+N Total harmonic distortion + noise(4) VS = 5 V, VO = 1 VRMS, G = 1, f = 1 kHz,
RL = 10 kΩ, TA = 25°C		 0.005%
OUTPUT
VO Voltage output swing from supply rails VS = 1.8 V to 5.5 V, RL = 10 kΩ, TA = 25°C 5 25 mV
VS = 1.8 V to 5.5 V, RL = 2 kΩ, TA = 25°C 22 45
ISC Short-circuit current VS = 5 V, TA = 25°C ±20 mA
RO Open-loop output impedance VS = 5.5 V, ƒ = 100 Hz, TA = 25°C 570 Ω
POWER SUPPLY
VS Specified voltage range 1.8 5.5 V
IQ Quiescent current per amplifier, over temperature VS = 5 V, IO = 0 mA, TA = –40°C to +125°C 150 250 µA
TEMPERATURE
Specified range –40 125 °C
Tstg Storage range –65 150 °C
(1) Parameters with minimum or maximum specification limits are 100% production tested at 25ºC, unless otherwise noted. Over-temperature limits are based on characterization and statistical analysis.
(2) Specified by design and characterization; not production tested.
(3) Signifies the slower value of the positive or negative slew rate.
(4) Third-order filter; bandwidth = 80 kHz at –3 dB.