11.1 Layout Guidelines

To achieve the levels of high performance of the TLV237x, follow proper printed-circuit board design techniques. A general set of guidelines is given in the following.

• Ground planes—TI highly recommends using a ground plane on the board to provide all components with a low inductive ground connection. However, in the areas of the amplifier inputs and output, the ground plane can be removed to minimize the stray capacitance.
• Proper power supply decoupling—Use a 6.8-μF tantalum capacitor in parallel with a 0.1-μF ceramic capacitor on each supply terminal. It may be possible to share the tantalum among several amplifiers depending on the application, but a 0.1-μF ceramic capacitor should always be used on the supply terminal of every amplifier. In addition, the 0.1-μF capacitor must be placed as close as possible to the supply terminal. As this distance increases, the inductance in the connecting trace makes the capacitor less effective. The designer should strive for distances of less than 0.1 inches between the device power terminals and the ceramic capacitors.
• Sockets—Sockets can be used but are not recommended. The additional lead inductance in the socket pins will often lead to stability problems. Surface-mount packages soldered directly to the printed-circuit board is the best implementation.
• Short trace runs and compact part placements—Optimum high performance is achieved when stray series inductance has been minimized. To realize this, the circuit layout must be made as compact as possible, thereby minimizing the length of all trace runs. Pay particular attention to the inverting input of the amplifier. Its length must be kept as short as possible. This helps to minimize stray capacitance at the input of the amplifier.
• Surface-mount passive components—Using surface-mount passive components is recommended for high performance amplifier circuits for several reasons. First, because of the extremely low lead inductance of surface-mount components, the problem with stray series inductance is greatly reduced. Second, the small size of surface-mount components naturally leads to a more compact layout thereby minimizing both stray inductance and capacitance. If leaded components are used, TI recommends that the lead lengths be kept as short as possible.

11.2 Layout Example

Figure 40. Schematic Representation

Figure 41. Operational Amplifier Board Layout for Noninverting Configuration

11.3 Power Dissipation Considerations

For a given θ_JA, the maximum power dissipation is shown in Figure 42 and is calculated by Equation 4:

Equation 4.

where

• P_D = Maximum power dissipation of TLV237x IC (watts)
• T_MAX = Absolute maximum junction temperature (150°C)
• T_A = Free-ambient air temperature (°C)
• θ_JA = θ_JC (Thermal coefficient from junction to case) + θ_CA (Thermal coefficient from case to ambient air (°C/W))

Results are with no air flow and using JEDEC Standard Low-K test PCB.

Figure 42. Maximum Power Dissipation vs Free-Air Temperature