SBOS837A November   2016  – January 2019 TLV2314-Q1 , TLV314-Q1 , TLV4314-Q1

PRODUCTION DATA.  

  1. Features
  2. Applications
  3. Description
    1.     Device Images
      1.      EMIRR vs Frequency
  4. Revision History
  5. Pin Configuration and Functions
    1.     Pin Functions: TLV314-Q1
    2.     Pin Functions: TLV2314-Q1
    3.     Pin Functions: TLV4314-Q1
  6. Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information: TLV314-Q1
    5. 6.5 Thermal Information: TLV2314-Q1
    6. 6.6 Thermal Information: TLV4314-Q1
    7. 6.7 Electrical Characteristics
    8. 6.8 Typical Characteristics
    9. 6.9 Typical Characteristics
  7. Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Operating Voltage
      2. 7.3.2 Rail-to-Rail Input
      3. 7.3.3 Rail-to-Rail Output
      4. 7.3.4 Common-Mode Rejection Ratio (CMRR)
      5. 7.3.5 Capacitive Load and Stability
      6. 7.3.6 EMI Susceptibility and Input Filtering
    4. 7.4 Device Functional Modes
  8. Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
      3. 8.2.3 Application Curve
    3. 8.3 System Examples
  9. Power Supply Recommendations
    1. 9.1 Input and ESD Protection
  10. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Example
  11. 11Device and Documentation Support
    1. 11.1 Device Support
      1. 11.1.1 Development Support
    2. 11.2 Documentation Support
      1. 11.2.1 Related Documentation
    3. 11.3 Related Links
    4. 11.4 Community Resources
    5. 11.5 Trademarks
    6. 11.6 Electrostatic Discharge Caution
    7. 11.7 Glossary
  12. 12Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

Pin Configuration and Functions

TLV314-Q1 DBV Package
5-Pin SOT-23
Top View
TLV314-Q1 TLV2314-Q1 TLV4314-Q1 po_sot23-5_bos406.gif
TLV314-Q1 DCK Package
5-Pin SC70
Top View
TLV314-Q1 TLV2314-Q1 TLV4314-Q1 po_sc70_bos406.gif

Pin Functions: TLV314-Q1

PIN I/O DESCRIPTION
NAME DBV
(SOT-23)
DCK (SC70)
–IN 4 3 I Inverting input
+IN 3 1 I Noninverting input
OUT 1 4 O Output
V– 2 2 Negative (lowest) supply
V+ 5 5 Positive (highest) supply
TLV2314-Q1 D Package
8-Pin SOIC
Top View
TLV314-Q1 TLV2314-Q1 TLV4314-Q1 po_so_msop_bos406.gif

Pin Functions: TLV2314-Q1

PIN I/O DESCRIPTION
NAME NO.
–IN A 2 I Inverting input, channel A
+IN A 3 I Noninverting input, channel A
–IN B 6 I Inverting input, channel B
+IN B 5 I Noninverting input, channel B
OUT A 1 O Output, channel A
OUT B 7 O Output, channel B
V– 4 Negative (lowest) supply
V+ 8 Positive (highest) supply
TLV4314-Q1 PW Package
14-Pin TSSOP
Top View
TLV314-Q1 TLV2314-Q1 TLV4314-Q1 po_pw_tssop-14_bos563.gif

Pin Functions: TLV4314-Q1

PIN I/O DESCRIPTION
NAME NO.
–IN A 2 I Inverting input, channel A
+IN A 3 I Noninverting input, channel A
–IN B 6 I Inverting input, channel B
+IN B 5 I Noninverting input, channel B
–IN C 9 I Inverting input, channel C
+IN C 10 I Noninverting input, channel C
–IN D 13 I Inverting input, channel D
+IN D 12 I Noninverting input, channel D
OUT A 1 O Output, channel A
OUT B 7 O Output, channel B
OUT C 8 O Output, channel C
OUT D 14 O Output, channel D
V– 11 Negative (lowest) supply
V+ 4 Positive (highest) supply