SBAS906 March 2018 TLV320ADC3100
PRODUCTION DATA.
7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
R PGA BYPASS | RCH_SELCM | RCH_SEL3X | RCH_SEL2X | Reserved | Reserved | ||
R/W-0h | R/W-0h | R/W-01h | R/W-01h | R/W-1h | R/W-1h |
Bit | Field | Type | Reset | Description(1) |
---|---|---|---|---|
7 | R PGA BYPASS | R/W | 0h | 0: Do not bypass right PGA
1: Bypass right PGA, unbuffered differential pair using the IN2R(P) as plus and IN3R(M) as minus inputs |
6 | RCH_SELCM | R/W | 0h | 0: Right ADC channel unselected inputs are not biased weakly to the ADC common-mode voltage
1: Right ADC channel unselected inputs are biased weakly to the ADC common-mode voltage |
5:4 | RCH_SEL3X | R/W | 01h | Differential pair using the IN2L(P) as plus and IN2R(M) as minus inputs.
00: 0-dB setting is chosen 01: –6 dB setting is chosen 10–11: Not connected to the right ADC PGA |
3:2 | RCH_SEL2X | R/W | 01h | Differential pair using the IN2L(P) as plus and IN3L(M) as minus inputs.
00: 0-dB setting is chosen 01: –6-dB setting is chosen 10, 11: Not connected to the right ADC PGA |
1:0 | Reserved | R/W | 1h | Reserved. Do not write any value other than reset value. |