SBASA58A December   2020  – June 2021 TLV320ADC5120

PRODUCTION DATA  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Revision History
  5. 5 Device Comparison Table
  6. 6 Pin Configuration and Functions
  7. 7 Specifications
    1. 7.1  Absolute Maximum Ratings
    2. 7.2  ESD Ratings
    3. 7.3  Recommended Operating Conditions
    4. 7.4  Thermal Information
    5. 7.5  Electrical Characteristics
    6. 7.6  Timing Requirements: I2C Interface
    7. 7.7  Switching Characteristics: I2C Interface
    8. 7.8  Timing Requirements: TDM, I2S or LJ Interface
    9. 7.9  Switching Characteristics: TDM, I2S or LJ Interface
    10. 7.10 Timing Requirements: PDM Digital Microphone Interface
    11. 7.11 Switching Characteristics: PDM Digital Microphone Interface
    12. 7.12 Timing Diagrams
    13. 7.13 Typical Characteristics
  8. 8 Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1  Serial Interfaces
        1. 8.3.1.1 Control Serial Interfaces
        2. 8.3.1.2 Audio Serial Interfaces
          1. 8.3.1.2.1 Time Division Multiplexed Audio (TDM) Interface
          2. 8.3.1.2.2 Inter IC Sound (I2S) Interface
          3. 8.3.1.2.3 Left-Justified (LJ) Interface
        3. 8.3.1.3 Using Multiple Devices With Shared Buses
      2. 8.3.2  Phase-Locked Loop (PLL) and Clock Generation
      3. 8.3.3  Input Channel Configurations
      4. 8.3.4  Reference Voltage
      5. 8.3.5  Programmable Microphone Bias
      6. 8.3.6  Signal-Chain Processing
        1. 8.3.6.1 Programmable Channel Gain and Digital Volume Control
        2. 8.3.6.2 Programmable Channel Gain Calibration
        3. 8.3.6.3 Programmable Channel Phase Calibration
        4. 8.3.6.4 Programmable Digital High-Pass Filter
        5. 8.3.6.5 Programmable Digital Biquad Filters
        6. 8.3.6.6 Programmable Channel Summer and Digital Mixer
        7. 8.3.6.7 Configurable Digital Decimation Filters
          1. 8.3.6.7.1 Linear Phase Filters
            1. 8.3.6.7.1.1 Sampling Rate: 7.35 kHz to 8 kHz
            2. 8.3.6.7.1.2 Sampling Rate: 14.7 kHz to 16 kHz
            3. 8.3.6.7.1.3 Sampling Rate: 22.05 kHz to 24 kHz
            4. 8.3.6.7.1.4 Sampling Rate: 29.4 kHz to 32 kHz
            5. 8.3.6.7.1.5 Sampling Rate: 44.1 kHz to 48 kHz
            6. 8.3.6.7.1.6 Sampling Rate: 88.2 kHz to 96 kHz
            7. 8.3.6.7.1.7 Sampling Rate: 176.4 kHz to 192 kHz
            8. 8.3.6.7.1.8 Sampling Rate: 352.8 kHz to 384 kHz
            9. 8.3.6.7.1.9 Sampling Rate: 705.6 kHz to 768 kHz
          2. 8.3.6.7.2 Low-Latency Filters
            1. 8.3.6.7.2.1 Sampling Rate: 14.7 kHz to 16 kHz
            2. 8.3.6.7.2.2 Sampling Rate: 22.05 kHz to 24 kHz
            3. 8.3.6.7.2.3 Sampling Rate: 29.4 kHz to 32 kHz
            4. 8.3.6.7.2.4 Sampling Rate: 44.1 kHz to 48 kHz
            5. 8.3.6.7.2.5 Sampling Rate: 88.2 kHz to 96 kHz
            6. 8.3.6.7.2.6 Sampling Rate: 176.4 kHz to 192 kHz
          3. 8.3.6.7.3 Ultra-Low Latency Filters
            1. 8.3.6.7.3.1 Sampling Rate: 14.7 kHz to 16 kHz
            2. 8.3.6.7.3.2 Sampling Rate: 22.05 kHz to 24 kHz
            3. 8.3.6.7.3.3 Sampling Rate: 29.4 kHz to 32 kHz
            4. 8.3.6.7.3.4 Sampling Rate: 44.1 kHz to 48 kHz
            5. 8.3.6.7.3.5 Sampling Rate: 88.2 kHz to 96 kHz
            6. 8.3.6.7.3.6 Sampling Rate: 176.4 kHz to 192 kHz
            7. 8.3.6.7.3.7 Sampling Rate: 352.8 kHz to 384 kHz
      7. 8.3.7  Dynamic Range Enhancer (DRE)
      8. 8.3.8  Dynamic Range Compressor (DRC)
      9. 8.3.9  Automatic Gain Controller (AGC)
      10. 8.3.10 Voice Activity Detection (VAD)
      11. 8.3.11 Digital PDM Microphone Record Channel
      12. 8.3.12 Interrupts, Status, and Digital I/O Pin Multiplexing
    4. 8.4 Device Functional Modes
      1. 8.4.1 Sleep Mode or Software Shutdown
      2. 8.4.2 Active Mode
      3. 8.4.3 Software Reset
    5. 8.5 Programming
      1. 8.5.1 Control Serial Interfaces
        1. 8.5.1.1 I2C Control Interface
          1. 8.5.1.1.1 General I2C Operation
          2. 8.5.1.1.2 I2C Single-Byte and Multiple-Byte Transfers
            1. 8.5.1.1.2.1 I2C Single-Byte Write
            2. 8.5.1.1.2.2 I2C Multiple-Byte Write
            3. 8.5.1.1.2.3 I2C Single-Byte Read
            4. 8.5.1.1.2.4 I2C Multiple-Byte Read
    6. 8.6 Register Maps
      1. 8.6.1 Device Configuration Registers
        1. 8.6.1.1 TLV320ADC5120 Access Codes
      2. 8.6.2 Page 0 Registers
      3. 8.6.3 Page 1 Registers
      4. 8.6.4 Programmable Coefficient Registers
        1. 8.6.4.1 Programmable Coefficient Registers: Page 2
        2. 8.6.4.2 Programmable Coefficient Registers: Page 3
        3. 8.6.4.3 Programmable Coefficient Registers: Page 4
  9. 9 Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Applications
      1. 9.2.1 Two-Channel Analog Microphone Recording
        1. 9.2.1.1 Design Requirements
        2. 9.2.1.2 Detailed Design Procedure
          1. 9.2.1.2.1 Example Device Register Configuration Script for EVM Setup
        3. 9.2.1.3 Application Curves
      2. 9.2.2 Four-Channel Digital PDM Microphone Recording
        1. 9.2.2.1 Design Requirements
        2. 9.2.2.2 Detailed Design Procedure
          1. 9.2.2.2.1 Example Device Register Configuration Script for EVM Setup
    3. 9.3 What to Do and What Not to Do
  10. 10Power Supply Recommendations
  11. 11Layout
    1. 11.1 Layout Guidelines
    2. 11.2 Layout Example
  12. 12Device and Documentation Support
    1. 12.1 Documentation Support
      1. 12.1.1 Related Documentation
    2. 12.2 Receiving Notification of Documentation Updates
    3. 12.3 Support Resources
    4. 12.4 Trademarks
    5. 12.5 Electrostatic Discharge Caution
    6. 12.6 Glossary
  13. 13Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

8.6.4.1 Programmable Coefficient Registers: Page 2

This register page (shown in Table 8-116) consists of the programmable coefficients for the biquad 1 to biquad 6 filters. To optimize the coefficients register transaction time for page 2, page 3, and page 4, the device also supports (by default) auto-incremented pages for the I2C writes and reads. After a transaction of register address 0x7F, the device auto increments to the next page at register 0x08 to transact the next coefficient value.

Table 8-116 Page 2 Programmable Coefficient Registers
ADDRESS ACRONYM REGISTER NAME RESET VALUE
0x00 PAGE[7:0] Device page register 0x00
0x08 BQ1_N0_BYT1[7:0] Programmable biquad 1, N0 coefficient byte[31:24] 0x7F
0x09 BQ1_N0_BYT2[7:0] Programmable biquad 1, N0 coefficient byte[23:16] 0xFF
0x0A BQ1_N0_BYT3[7:0] Programmable biquad 1, N0 coefficient byte[15:8] 0xFF
0x0B BQ1_N0_BYT4[7:0] Programmable biquad 1, N0 coefficient byte[7:0] 0xFF
0x0C BQ1_N1_BYT1[7:0] Programmable biquad 1, N1 coefficient byte[31:24] 0x00
0x0D BQ1_N1_BYT2[7:0] Programmable biquad 1, N1 coefficient byte[23:16] 0x00
0x0E BQ1_N1_BYT3[7:0] Programmable biquad 1, N1 coefficient byte[15:8] 0x00
0x0F BQ1_N1_BYT4[7:0] Programmable biquad 1, N1 coefficient byte[7:0] 0x00
0x10 BQ1_N2_BYT1[7:0] Programmable biquad 1, N2 coefficient byte[31:24] 0x00
0x11 BQ1_N2_BYT2[7:0] Programmable biquad 1, N2 coefficient byte[23:16] 0x00
0x12 BQ1_N2_BYT3[7:0] Programmable biquad 1, N2 coefficient byte[15:8] 0x00
0x13 BQ1_N2_BYT4[7:0] Programmable biquad 1, N2 coefficient byte[7:0] 0x00
0x14 BQ1_D1_BYT1[7:0] Programmable biquad 1, D1 coefficient byte[31:24] 0x00
0x15 BQ1_D1_BYT2[7:0] Programmable biquad 1, D1 coefficient byte[23:16] 0x00
0x16 BQ1_D1_BYT3[7:0] Programmable biquad 1, D1 coefficient byte[15:8] 0x00
0x17 BQ1_D1_BYT4[7:0] Programmable biquad 1, D1 coefficient byte[7:0] 0x00
0x18 BQ1_D2_BYT1[7:0] Programmable biquad 1, D2 coefficient byte[31:24] 0x00
0x19 BQ1_D2_BYT2[7:0] Programmable biquad 1, D2 coefficient byte[23:16] 0x00
0x1A BQ1_D2_BYT3[7:0] Programmable biquad 1, D2 coefficient byte[15:8] 0x00
0x1B BQ1_D2_BYT4[7:0] Programmable biquad 1, D2 coefficient byte[7:0] 0x00
0x1C BQ2_N0_BYT1[7:0] Programmable biquad 2, N0 coefficient byte[31:24] 0x7F
0x1D BQ2_N0_BYT2[7:0] Programmable biquad 2, N0 coefficient byte[23:16] 0xFF
0x1E BQ2_N0_BYT3[7:0] Programmable biquad 2, N0 coefficient byte[15:8] 0xFF
0x1F BQ2_N0_BYT4[7:0] Programmable biquad 2, N0 coefficient byte[7:0] 0xFF
0x20 BQ2_N1_BYT1[7:0] Programmable biquad 2, N1 coefficient byte[31:24] 0x00
0x21 BQ2_N1_BYT2[7:0] Programmable biquad 2, N1 coefficient byte[23:16] 0x00
0x22 BQ2_N1_BYT3[7:0] Programmable biquad 2, N1 coefficient byte[15:8] 0x00
0x23 BQ2_N1_BYT4[7:0] Programmable biquad 2, N1 coefficient byte[7:0] 0x00
0x24 BQ2_N2_BYT1[7:0] Programmable biquad 2, N2 coefficient byte[31:24] 0x00
0x25 BQ2_N2_BYT2[7:0] Programmable biquad 2, N2 coefficient byte[23:16] 0x00
0x26 BQ2_N2_BYT3[7:0] Programmable biquad 2, N2 coefficient byte[15:8] 0x00
0x27 BQ2_N2_BYT4[7:0] Programmable biquad 2, N2 coefficient byte[7:0] 0x00
0x28 BQ2_D1_BYT1[7:0] Programmable biquad 2, D1 coefficient byte[31:24] 0x00
0x29 BQ2_D1_BYT2[7:0] Programmable biquad 2, D1 coefficient byte[23:16] 0x00
0x2A BQ2_D1_BYT3[7:0] Programmable biquad 2, D1 coefficient byte[15:8] 0x00
0x2B BQ2_D1_BYT4[7:0] Programmable biquad 2, D1 coefficient byte[7:0] 0x00
0x2C BQ2_D2_BYT1[7:0] Programmable biquad 2, D2 coefficient byte[31:24] 0x00
0x2D BQ2_D2_BYT2[7:0] Programmable biquad 2, D2 coefficient byte[23:16] 0x00
0x2E BQ2_D2_BYT3[7:0] Programmable biquad 2, D2 coefficient byte[15:8] 0x00
0x2F BQ2_D2_BYT4[7:0] Programmable biquad 2, D2 coefficient byte[7:0] 0x00
0x30 BQ3_N0_BYT1[7:0] Programmable biquad 3, N0 coefficient byte[31:24] 0x7F
0x31 BQ3_N0_BYT2[7:0] Programmable biquad 3, N0 coefficient byte[23:16] 0xFF
0x32 BQ3_N0_BYT3[7:0] Programmable biquad 3, N0 coefficient byte[15:8] 0xFF
0x33 BQ3_N0_BYT4[7:0] Programmable biquad 3, N0 coefficient byte[7:0] 0xFF
0x34 BQ3_N1_BYT1[7:0] Programmable biquad 3, N1 coefficient byte[31:24] 0x00
0x35 BQ3_N1_BYT2[7:0] Programmable biquad 3, N1 coefficient byte[23:16] 0x00
0x36 BQ3_N1_BYT3[7:0] Programmable biquad 3, N1 coefficient byte[15:8] 0x00
0x37 BQ3_N1_BYT4[7:0] Programmable biquad 3, N1 coefficient byte[7:0] 0x00
0x38 BQ3_N2_BYT1[7:0] Programmable biquad 3, N2 coefficient byte[31:24] 0x00
0x39 BQ3_N2_BYT2[7:0] Programmable biquad 3, N2 coefficient byte[23:16] 0x00
0x3A BQ3_N2_BYT3[7:0] Programmable biquad 3, N2 coefficient byte[15:8] 0x00
0x3B BQ3_N2_BYT4[7:0] Programmable biquad 3, N2 coefficient byte[7:0] 0x00
0x3C BQ3_D1_BYT1[7:0] Programmable biquad 3, D1 coefficient byte[31:24] 0x00
0x3D BQ3_D1_BYT2[7:0] Programmable biquad 3, D1 coefficient byte[23:16] 0x00
0x3E BQ3_D1_BYT3[7:0] Programmable biquad 3, D1 coefficient byte[15:8] 0x00
0x3F BQ3_D1_BYT4[7:0] Programmable biquad 3, D1 coefficient byte[7:0] 0x00
0x40 BQ3_D2_BYT1[7:0] Programmable biquad 3, D2 coefficient byte[31:24] 0x00
0x41 BQ3_D2_BYT2[7:0] Programmable biquad 3, D2 coefficient byte[23:16] 0x00
0x42 BQ3_D2_BYT3[7:0] Programmable biquad 3, D2 coefficient byte[15:8] 0x00
0x43 BQ3_D2_BYT4[7:0] Programmable biquad 3, D2 coefficient byte[7:0] 0x00
0x44 BQ4_N0_BYT1[7:0] Programmable biquad 4, N0 coefficient byte[31:24] 0x7F
0x45 BQ4_N0_BYT2[7:0] Programmable biquad 4, N0 coefficient byte[23:16] 0xFF
0x46 BQ4_N0_BYT3[7:0] Programmable biquad 4, N0 coefficient byte[15:8] 0xFF
0x47 BQ4_N0_BYT4[7:0] Programmable biquad 4, N0 coefficient byte[7:0] 0xFF
0x48 BQ4_N1_BYT1[7:0] Programmable biquad 4, N1 coefficient byte[31:24] 0x00
0x49 BQ4_N1_BYT2[7:0] Programmable biquad 4, N1 coefficient byte[23:16] 0x00
0x4A BQ4_N1_BYT3[7:0] Programmable biquad 4, N1 coefficient byte[15:8] 0x00
0x4B BQ4_N1_BYT4[7:0] Programmable biquad 4, N1 coefficient byte[7:0] 0x00
0x4C BQ4_N2_BYT1[7:0] Programmable biquad 4, N2 coefficient byte[31:24] 0x00
0x4D BQ4_N2_BYT2[7:0] Programmable biquad 4, N2 coefficient byte[23:16] 0x00
0x4E BQ4_N2_BYT3[7:0] Programmable biquad 4, N2 coefficient byte[15:8] 0x00
0x4F BQ4_N2_BYT4[7:0] Programmable biquad 4, N2 coefficient byte[7:0] 0x00
0x50 BQ4_D1_BYT1[7:0] Programmable biquad 4, D1 coefficient byte[31:24] 0x00
0x51 BQ4_D1_BYT2[7:0] Programmable biquad 4, D1 coefficient byte[23:16] 0x00
0x52 BQ4_D1_BYT3[7:0] Programmable biquad 4, D1 coefficient byte[15:8] 0x00
0x53 BQ4_D1_BYT4[7:0] Programmable biquad 4, D1 coefficient byte[7:0] 0x00
0x54 BQ4_D2_BYT1[7:0] Programmable biquad 4, D2 coefficient byte[31:24] 0x00
0x55 BQ4_D2_BYT2[7:0] Programmable biquad 4, D2 coefficient byte[23:16] 0x00
0x56 BQ4_D2_BYT3[7:0] Programmable biquad 4, D2 coefficient byte[15:8] 0x00
0x57 BQ4_D2_BYT4[7:0] Programmable biquad 4, D2 coefficient byte[7:0] 0x00
0x58 BQ5_N0_BYT1[7:0] Programmable biquad 5, N0 coefficient byte[31:24] 0x7F
0x59 BQ5_N0_BYT2[7:0] Programmable biquad 5, N0 coefficient byte[23:16] 0xFF
0x5A BQ5_N0_BYT3[7:0] Programmable biquad 5, N0 coefficient byte[15:8] 0xFF
0x5B BQ5_N0_BYT4[7:0] Programmable biquad 5, N0 coefficient byte[7:0] 0xFF
0x5C BQ5_N1_BYT1[7:0] Programmable biquad 5, N1 coefficient byte[31:24] 0x00
0x5D BQ5_N1_BYT2[7:0] Programmable biquad 5, N1 coefficient byte[23:16] 0x00
0x5E BQ5_N1_BYT3[7:0] Programmable biquad 5, N1 coefficient byte[15:8] 0x00
0x5F BQ5_N1_BYT4[7:0] Programmable biquad 5, N1 coefficient byte[7:0] 0x00
0x60 BQ5_N2_BYT1[7:0] Programmable biquad 5, N2 coefficient byte[31:24] 0x00
0x61 BQ5_N2_BYT2[7:0] Programmable biquad 5, N2 coefficient byte[23:16] 0x00
0x62 BQ5_N2_BYT3[7:0] Programmable biquad 5, N2 coefficient byte[15:8] 0x00
0x63 BQ5_N2_BYT4[7:0] Programmable biquad 5, N2 coefficient byte[7:0] 0x00
0x64 BQ5_D1_BYT1[7:0] Programmable biquad 5, D1 coefficient byte[31:24] 0x00
0x65 BQ5_D1_BYT2[7:0] Programmable biquad 5, D1 coefficient byte[23:16] 0x00
0x66 BQ5_D1_BYT3[7:0] Programmable biquad 5, D1 coefficient byte[15:8] 0x00
0x67 BQ5_D1_BYT4[7:0] Programmable biquad 5, D1 coefficient byte[7:0] 0x00
0x68 BQ5_D2_BYT1[7:0] Programmable biquad 5, D2 coefficient byte[31:24] 0x00
0x69 BQ5_D2_BYT2[7:0] Programmable biquad 5, D2 coefficient byte[23:16] 0x00
0x6A BQ5_D2_BYT3[7:0] Programmable biquad 5, D2 coefficient byte[15:8] 0x00
0x6B BQ5_D2_BYT4[7:0] Programmable biquad 5, D2 coefficient byte[7:0] 0x00
0x6C BQ6_N0_BYT1[7:0] Programmable biquad 6, N0 coefficient byte[31:24] 0x7F
0x6D BQ6_N0_BYT2[7:0] Programmable biquad 6, N0 coefficient byte[23:16] 0xFF
0x6E BQ6_N0_BYT3[7:0] Programmable biquad 6, N0 coefficient byte[15:8] 0xFF
0x6F BQ6_N0_BYT4[7:0] Programmable biquad 6, N0 coefficient byte[7:0] 0xFF
0x70 BQ6_N1_BYT1[7:0] Programmable biquad 6, N1 coefficient byte[31:24] 0x00
0x71 BQ6_N1_BYT2[7:0] Programmable biquad 6, N1 coefficient byte[23:16] 0x00
0x72 BQ6_N1_BYT3[7:0] Programmable biquad 6, N1 coefficient byte[15:8] 0x00
0x73 BQ6_N1_BYT4[7:0] Programmable biquad 6, N1 coefficient byte[7:0] 0x00
0x74 BQ6_N2_BYT1[7:0] Programmable biquad 6, N2 coefficient byte[31:24] 0x00
0x75 BQ6_N2_BYT2[7:0] Programmable biquad 6, N2 coefficient byte[23:16] 0x00
0x76 BQ6_N2_BYT3[7:0] Programmable biquad 6, N2 coefficient byte[15:8] 0x00
0x77 BQ6_N2_BYT4[7:0] Programmable biquad 6, N2 coefficient byte[7:0] 0x00
0x78 BQ6_D1_BYT1[7:0] Programmable biquad 6, D1 coefficient byte[31:24] 0x00
0x79 BQ6_D1_BYT2[7:0] Programmable biquad 6, D1 coefficient byte[23:16] 0x00
0x7A BQ6_D1_BYT3[7:0] Programmable biquad 6, D1 coefficient byte[15:8] 0x00
0x7B BQ6_D1_BYT4[7:0] Programmable biquad 6, D1 coefficient byte[7:0] 0x00
0x7C BQ6_D2_BYT1[7:0] Programmable biquad 6, D2 coefficient byte[31:24] 0x00
0x7D BQ6_D2_BYT2[7:0] Programmable biquad 6, D2 coefficient byte[23:16] 0x00
0x7E BQ6_D2_BYT3[7:0] Programmable biquad 6, D2 coefficient byte[15:8] 0x00
0x7F BQ6_D2_BYT4[7:0] Programmable biquad 6, D2 coefficient byte[7:0] 0x00