SBASA92 Data sheet | TI.com

SBASA92A December 2020 – June 2021 TLV320ADC6120

PRODUCTION DATA

Package Options

Mechanical Data (Package|Pins)

RTE|20
- MPQF596

Thermal pad, mechanical data (Package|Pins)

Orderable Information

7.13 Typical Characteristics

at T_A = 25°C, AVDD = 3.3 V, IOVDD = 3.3 V, f_IN = 1-kHz sinusoidal signal, f_S = 48 kHz, 32-bit audio data, BCLK = 256 × f_S, TDM slave mode, PLL on, DRE_LVL = –36 dB, channel gain = 0 dB, and linear phase decimation filter (unless otherwise noted); all performance measurements are done with a 20-kHz, low-pass filter, and an A-weighted filter

Differential input

Figure 7-4 THD+N vs Input Amplitude With DRE Enabled

Single-ended input

Figure 7-6 THD+N vs Input Amplitude With DRE Enabled

Differential input with AVDD = 1.8 V and VREF = 1.375 V

Figure 7-8 THD+N vs Input Amplitude With DRE Enabled

Figure 7-10 THD+N vs Input Frequency at –60-dBr Input With DRE Enabled

Figure 7-12 THD+N vs Input Frequency at –1-dBr Input With DRE Disabled

Single-ended input

Figure 7-14 Input-Referred Noise vs Channel Gain

Figure 7-16 Power-Supply Rejection Ratio vs Ripple Frequency With 100-mV_PP Amplitude

Figure 7-18 FFT With Idle Input With DRE Disabled

Figure 7-20 FFT With a –60-dBr Input With DRE Disabled

High CMRR mode

Figure 7-22 Common-Mode Rejection Ratio vs Ripple Frequency With 100-mV_PP Amplitude and DRE Disabled

High CMRR mode

Figure 7-24 Input-Referred Noise vs Channel Gain

Differential input with high CMRR mode

Figure 7-26 THD+N vs Input Amplitude With DRE Disabled

Differential input

Figure 7-5 THD+N vs Input Amplitude With DRE Disabled

Single-ended input

Figure 7-7 THD+N vs Input Amplitude With DRE Disabled

Differential input with AVDD = 1.8 V and VREF = 1.375 V

Figure 7-9 THD+N vs Input Amplitude With DRE Disabled

Figure 7-11 THD+N vs Input Frequency at –60-dBr Input With DRE Disabled

Differential input

Figure 7-13 Input-Referred Noise vs Channel Gain

Figure 7-15 Frequency Response With a –12-dBr Input

Figure 7-17 FFT With Idle Input With DRE Enabled

Figure 7-19 FFT With a –60-dBr Input With DRE Enabled

Figure 7-21 FFT With a –1-dBr Input With DRE Disabled

High CMRR mode

Figure 7-23 Common-Mode Rejection Ratio vs Ripple Frequency With 100-mV_PP Amplitude and DRE Enabled

Differential input with high CMRR mode

Figure 7-25 THD+N vs Input Amplitude With DRE Enabled

Differential input with high CMRR mode

Figure 7-27 THD+N vs Input Frequency at –1-dBr Input With DRE Disabled