SLVS568D January   2005  – April 2016 TLV341 , TLV341A , TLV342 , TLV342S

PRODUCTION DATA.  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Revision History
  5. 5 Pin Configuration and Functions
  6. 6 Specifications
    1. 6.1  Absolute Maximum Ratings
    2. 6.2  ESD Ratings
    3. 6.3  Recommended Operating Conditions
    4. 6.4  Thermal Information: TLV341
    5. 6.5  Thermal Information: TLV342
    6. 6.6  Thermal Information: TLV342S
    7. 6.7  Electrical Characteristics: V+ = 1.8 V
    8. 6.8  Electrical Characteristics: V+ = 5 V
    9. 6.9  Shutdown Characteristics: V+ = 1.8 V
    10. 6.10 Shutdown Characteristics: V+ = 5 V
    11. 6.11 Typical Characteristics
  7. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 PMOS Input Stage
      2. 7.3.2 CMOS Output Stage
      3. 7.3.3 Shutdown
    4. 7.4 Device Functional Modes
  8. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
      3. 8.2.3 Application Curve
  9. 9 Power Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Example
  11. 11Device and Documentation Support
    1. 11.1 Related Links
    2. 11.2 Community Resource
    3. 11.3 Trademarks
    4. 11.4 Electrostatic Discharge Caution
    5. 11.5 Glossary
  12. 12Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

5 Pin Configuration and Functions

TLV341 DBV or DCK Package
6-Pin SOT-23 or SC70
Top View
TLV341 TLV341A TLV342 TLV342S TLV341_DBV_DCK_pinout_lvs568.gif
TLV341 DRL Package
6-Pin SOT
Top View
TLV341 TLV341A TLV342 TLV342S TLV341_DRL_pinout_lvs568.gif

Pin Functions: TLV341

PIN I/O DESCRIPTION
NAME SOT-23, SC70 SOT
1IN+ 1 2 I Noninverting input on channel 1
1IN– 3 3 I Inverting input on channel 1
1OUT 4 4 O Output on channel 1
GND 2 1 — Ground
SHDN 5 5 I Shutdown active low
V+ 6 6 — Positive power supply
TLV342 D or DGK Package
10-Pin SOIC or VSSOP
Top View
TLV341 TLV341A TLV342 TLV342S TLV342_DBV_DCK_pinout_lvs568.gif
TLV342 RUG Package
10-Pin X2QFN
Top View
TLV341 TLV341A TLV342 TLV342S TLV342_RUG_pinout_lvs568.gif

Pin Functions: TLV342

PIN I/O DESCRIPTION
NAME SOIC, VSSOP X2QFN
1IN+ 3 1 I Noninverting input on channel 1
1IN– 2 10 I Inverting input on channel 1
1OUT 1 9 O Output on channel 1
2IN+ 5 4 I Noninverting input on channel 2
2IN– 6 5 I Inverting input on channel 2
2OUT 7 6 O Output on channel 2
GND 4 2 — Ground
NC(1) — 3, 8 — Not connected
V+ 8 7 — Positive power supply
(1) NC – No internal connection
TLV342S RUG Package
10-Pin X2QFN
Top View
TLV341 TLV341A TLV342 TLV342S TLV342S_RUG_pinout_lvs568.gif

Pin Functions: TLV342S

PIN I/O DESCRIPTION
NAME NO.
1IN+ 1 I Noninverting input on channel 1
1IN– 10 I Inverting input on channel 1
1OUT 9 O Output on channel 1
2IN+ 4 I Noninverting input on channel 2
2IN– 5 I Inverting input on channel 2
2OUT 6 O Output on channel 2
GND 2 — Ground
NC(1) 8 — Not connected
SHDN 3 I Shutdown active low
V+ 7 — Positive power supply
(1) NC – No internal connection