SNOSDL8 November   2024 TLV3511-Q1

ADVANCE INFORMATION  

  1.   1
  2. Features
  3. Applications
  4. Description
  5. Pin Configuration and Functions
    1.     Pin Configurations: TLV3511 and TLV3512
  6. Specifications
    1. 5.1 Absolute Maximum Ratings
    2. 5.2 ESD Ratings
    3. 5.3 Recommended Operating Conditions
    4. 5.4 Thermal Information
    5. 5.5 Electrical Characteristics
    6. 5.6 Switching Characteristics
  7. Detailed Description
    1. 6.1 Overview
    2. 6.2 Functional Block Diagrams
    3. 6.3 Feature Description
    4. 6.4 Device Functional Modes
      1. 6.4.1 Inputs
        1. 6.4.1.1 Unused Inputs
      2. 6.4.2 Internal Hysteresis
      3. 6.4.3 Outputs
      4. 6.4.4 ESD Protection
      5. 6.4.5 Power-On Reset (POR)
    5. 6.5 Overview
  8. Application and Implementation
    1. 7.1 Application Information
      1. 7.1.1 Basic Comparator Definitions
        1. 7.1.1.1 Operation
        2. 7.1.1.2 Propagation Delay
        3. 7.1.1.3 Overdrive Voltage
      2. 7.1.2 Hysteresis
        1. 7.1.2.1 Inverting Comparator With Hysteresis
        2. 7.1.2.2 Non-Inverting Comparator With Hysteresis
    2. 7.2 Typical Applications
      1. 7.2.1 Low-Side Current Sensing
        1. 7.2.1.1 Design Requirements
        2. 7.2.1.2 Detailed Design Procedure
        3. 7.2.1.3 Application Curve
    3. 7.3 Power Supply Recommendations
    4. 7.4 Layout
      1. 7.4.1 Layout Guidelines
      2. 7.4.2 Layout Example
  9. Device and Documentation Support
    1. 8.1 Documentation Support
      1. 8.1.1 Related Documentation
    2. 8.2 Receiving Notification of Documentation Updates
    3. 8.3 Support Resources
    4. 8.4 Trademarks
    5. 8.5 Electrostatic Discharge Caution
    6. 8.6 Glossary
  10. Revision History
  11. 10Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

Power-On Reset (POR)

The TLV351x-Q1 devices have an internal Power-on-Reset (POR) circuit for known start-up or power-down conditions. While the power supply (V+) is ramping up or ramping down, the POR circuitry is activated for up to 2.5us after the VPOR of 2.2V is crossed. When the supply voltage is equal to or greater than the minimum supply voltage, and after the delay period, the comparator output reflects the state of the differential input (VID).

For the TLV351x-Q1 devices, the output is held low during the POR period (ton) as shown below.

TLV3511-Q1 Power-On Reset Timing DiagramFigure 6-3 Power-On Reset Timing Diagram