SNOSDA2F
August 2020 – June 2024
TLV3604
,
TLV3605
,
TLV3607
PRODUCTION DATA
1
1
Features
2
Applications
3
Description
4
Pin Configuration and Functions
Pin Configurations: TLV3604 and TLV3605
4.1
Pin Configuration: TLV3607
5
Specifications
5.1
Absolute Maximum Ratings
5.2
ESD Ratings
5.3
Recommended Operating Conditions
5.4
Thermal Information
5.5
Electrical Characteristics (VCCI = VCCO = 2.5V to 5V)
5.6
Typical Characteristics
6
Detailed Description
6.1
Overview
6.2
Functional Block Diagram
6.3
Feature Description
6.4
Device Functional Modes
6.4.1
Rail-to-Rail Inputs
6.4.2
LVDS Output
7
Application and Implementation
7.1
Application Information
7.1.1
Comparator Inputs
7.1.2
Capacitive Loads
7.1.3
Latch Functionality
7.1.4
Adjustable Hysteresis
7.2
Typical Application
7.2.1
Non-Inverting Comparator With Hysteresis
7.2.1.1
Design Requirements
7.2.1.2
Detailed Design Procedure
7.2.1.3
Application Performance Plots
7.2.2
Optical Receiver
7.2.3
Logic Clock Source to LVDS Transceiver
7.2.4
External Trigger Function for Oscilloscopes
7.3
Power Supply Recommendations
7.4
Layout
7.4.1
Layout Guidelines
7.4.2
Layout Example
8
Device and Documentation Support
8.1
Device Support
8.1.1
Development Support
8.2
Receiving Notification of Documentation Updates
8.3
Support Resources
8.4
Trademarks
8.5
Electrostatic Discharge Caution
8.6
Glossary
9
Revision History
10
Mechanical, Packaging, and Orderable Information
Package Options
Mechanical Data (Package|Pins)
DCK|6
MPDS114E
Thermal pad, mechanical data (Package|Pins)
Orderable Information
snosda2f_oa
snosda2f_pm
1
Features
Low propagation delay: 800ps
Low overdrive dispersion: 350ps
Quiescent current: 12.1mA
High toggle frequency: 1.5GHz / 3.0Gbps
Narrow pulse width detection capability: 600ps
LVDS output
Supply range: 2.4V to 5.5V
Input common-mode range extends 200mV beyond both rails
Low input offset voltage: ±5mV
Single and dual channel options