SBOSAA8C December   2022  – August 2024 TLV2365 , TLV365

PRODUCTION DATA  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Device Comparison Table
  6. 5 Pin Configuration and Functions
  7. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Typical Characteristics
  8. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Rail-to-Rail Input
      2. 7.3.2 Input and ESD Protection
      3. 7.3.3 Driving Capacitive Loads
      4. 7.3.4 Active Filter
    4. 7.4 Device Functional Modes
  9. 8 Application and Implementation
    1. 8.1 Application Information
      1. 8.1.1 Overdrive Recovery Performance
      2. 8.1.2 Achieving an Output Level of Zero Volts
    2. 8.2 Typical Applications
      1. 8.2.1 Second-Order Low-Pass Filter
        1. 8.2.1.1 Design Requirements
        2. 8.2.1.2 Detailed Design Procedure
        3. 8.2.1.3 Application Curve
      2. 8.2.2 ADC Driver and Reference Buffer
    3. 8.3 Power Supply Recommendations
    4. 8.4 Layout
      1. 8.4.1 Layout Guidelines
      2. 8.4.2 Layout Example
  10. 9 Device and Documentation Support
    1. 9.1 Device Support
      1. 9.1.1 Development Support
        1. 9.1.1.1 PSpice® for TI
        2. 9.1.1.2 TINA-TI™ Simulation Software (Free Download)
        3. 9.1.1.3 DIP-Adapter-EVM
        4. 9.1.1.4 DIYAMP-EVM
        5. 9.1.1.5 TI Reference Designs
        6. 9.1.1.6 Analog Filter Designer
    2. 9.2 Documentation Support
      1. 9.2.1 Related Documentation
    3. 9.3 Receiving Notification of Documentation Updates
    4. 9.4 Support Resources
    5. 9.5 Trademarks
    6. 9.6 Electrostatic Discharge Caution
    7. 9.7 Glossary
  11. 10Revision History
  12. 11Mechanical, Packaging, and Orderable Information

Package Options

Refer to the PDF data sheet for device specific package drawings

Mechanical Data (Package|Pins)
  • DBV|5
Thermal pad, mechanical data (Package|Pins)
Orderable Information

6.5 Electrical Characteristics

at VS = 2.2 V to 5.5 V, TA = 25°C, RL = 10 kΩ, VCM = VOUT = mid-supply, and gain = 1 V/V (unless otherwise noted)
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
OFFSET VOLTAGE
VOS Input offset voltage   ±0.4 ±1.9 mV
dVOS/dT Input offset voltage drift TA = –40°C to +125°C  ±0.5 ±2.6 µV/°C
PSRR Power-supply rejection ratio VS = 2.2 V to 5.5 V, TA = –40 to +125℃ 100 dB
INPUT BIAS CURRENT
IB Input bias current ±5 ±20 pA
TA = –40℃ to +125℃  See Figure 6-5
NOISE
Input voltage noise (peak-to-peak) f = 0.1 Hz to 10 Hz 5.4 µVPP
eN Input voltage noise density f = 500 kHz  4.5 nV/√Hz
in Input current noise density f = 1 kHz 5.8 fA/√Hz
INPUT VOLTAGE
VCM Common-mode voltage (V–) – 0.1 (V+) + 0.1 V
CMRR Common-mode rejection ratio (V–)  – 100 mV < VCM < (V+) + 100 mV  100 115 dB
TA = –40℃ to +125℃ 110
INPUT IMPEDANCE
CIN Differential 5 pF
Common-mode 1
OPEN-LOOP GAIN
AOL Open-loop voltage gain RL = 10 kΩ, (V–) + 0.1 V < VOUT < (V+) – 0.1 V 100 120 dB
RL = 10 kΩ, TA = –40 to +125℃ 113
RL = 600 Ω, (V–) + 0.2 V < VOUT < (V+) – 0.2 V 100 120
RL = 600 Ω, TA = –40 to +125℃ 110
Phase margin 56 °
FREQUENCY RESPONSE (VS = 5 V)
GBW Gain-bandwidth product 50 MHz
SR Slew rate 27 V/µs
tS Settling time 0.1%, 4-V step 0.15 µs
0.01%, 4-V step 0.2
Overdrive recovery time VIN+ × gain > VS  < 0.1 µs
THD + N Total harmonic distortion + noise(1) VOUT = 4 VPP, f = 1 kHz, RL = 600 Ω 0.00025 %
Channel-to-channel crosstalk
(TLV2365 only)		 VOUT = 2 VPP, f = 100 kHz 108 dBc
OUTPUT
  Output voltage swing from supply rails 10 mV
TA = –40°C to +125°C 12
ISC Short-circuit current ±85 mA
Capacitive load drive See Figure 6-16
ZO Open-loop output impedance f = 1 MHz, IO = 0 mA 40 Ω
POWER SUPPLY
IQ Quiescent current per amplifier IO = 0 mA 4.6 5.8 mA
IO = 0 mA, TA = –40°C to +125°C 6.3
(1) Low-pass-filter bandwidth is 20 kHz for f = 1 kHz.