SLVSEX0A March   2019  – July 2019 TLV61048

PRODUCTION DATA.  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
    1.     Device Images
      1.      Simplified Schematic
  4. 4 Revision History
  5. 5 Pin Configuration and Functions
    1.     Pin Functions
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Typical Characteristics
  7. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Undervoltage Lockout
      2. 7.3.2 Enable and Disable
      3. 7.3.3 Soft Start
      4. 7.3.4 Frequency Select (FREQ)
    4. 7.4 Device Functional Modes
      1. 7.4.1 PWM Mode
      2. 7.4.2 PFM Mode
  8. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Applications
      1. 8.2.1 12-V Output Boost Converter With External Bias
        1. 8.2.1.1 Design Requirements
        2. 8.2.1.2 Detailed Design Procedure
          1. 8.2.1.2.1 Programming the Output Voltage
          2. 8.2.1.2.2 Inductor Selection
          3. 8.2.1.2.3 Input and Output Capacitor Selection
          4. 8.2.1.2.4 Diode Rectifier Selection
        3. 8.2.1.3 Application Curves
      2. 8.2.2 14-V Output Boost Converter
        1. 8.2.2.1 Design Requirements
        2. 8.2.2.2 Detailed Design Procedure
          1. 8.2.2.2.1 Inductor Selection
          2. 8.2.2.2.2 Input and Output Capacitor Selection
  9. 9 Power Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Example
  11. 11Device and Documentation Support
    1. 11.1 Device Support
      1. 11.1.1 Third-Party Products Disclaimer
    2. 11.2 Receiving Notification of Documentation Updates
    3. 11.3 Community Resources
    4. 11.4 Trademarks
    5. 11.5 Electrostatic Discharge Caution
    6. 11.6 Glossary
  12. 12Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

6.5 Electrical Characteristics

TA = –40°C to 85°C, VIN = 3.3 V. Typical values are at TA = 25°C, unless otherwise noted.
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
POWER SUPPLY
VIN Input voltage range 2.65 5.5 V
VIN_UVLO Under voltage lockout threshold VIN rising 2.55 2.65 V
VIN falling 2.3 2.4
VIN_HYS VIN UVLO hysteresis 150 mV
IQ_VIN Quiescent current into VIN pin IC enabled, no load, no switching 100 µA
ISD Shutdown current into VIN pin IC disabled, VIN = 2.6 V to 5.5 V, TA = 25°C 1.0 µA
OUTPUT
VOUT Output voltage range 3.3 14 V
VREF Feedback voltage PWM mode, TA=-40°C to 125°C 0.78 0.8 0.82 V
PFM mode, TA=25°C 0.81 V
IFB_LKG Leakage current into FB pin TA = 25°C 50 nA
ISW_LKG Leakage current into SW pin IC disabled, SW = 5.5V 500 nA
POWER SWITCH
RDS(on) Low-side MOSFET on resistance VIN = 3.3, VOUT = 12V 85 mΩ
fSW Switching frequency VIN = 3.3 V, VOUT = 12 V, PWM mode 430 550 630 kHz
VIN = 3.3 V, VOUT = 12 V, PWM mode 850 1000 1250 kHz
tOFF_min Min. off time 130 ns
ILIM_SW Peak switch current limit 600kHz, VIN = 3.3V 2.9 3.7 4.5 A
tSTARTUP Startup time 2 ms
LOGIC INTERFACE
VEN_H EN Logic high threshold 1.2 V
VEN_L EN Logic low threshold 0.4 V
REN EN Pull Down Resistor 1 MΩ
RFREQ FREQ pull up resistance 950 kΩ
VFREQ_H FREQ logic high threshold 1.2 V
VFREQ_L FREQ logic low threshold 0.4 V
PROTECTION
TSD Thermal shutdown threshold TJ rising 150 °C
TSD_HYS Thermal shutdown hysteresis TJ falling below TSD 20 °C