SLVSDG1C DECEMBER   2016  – October 2017 TLV62569

UNLESS OTHERWISE NOTED, this document contains PRODUCTION DATA.  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Revision History
  5. 5 Pin Configuration and Functions
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Typical Characteristics
  7. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagrams
    3. 7.3 Feature Description
      1. 7.3.1 Power Save Mode
      2. 7.3.2 100% Duty Cycle Low Dropout Operation
      3. 7.3.3 Soft Startup
      4. 7.3.4 Switch Current Limit
      5. 7.3.5 Under Voltage Lockout
      6. 7.3.6 Thermal Shutdown
    4. 7.4 Device Functional Modes
      1. 7.4.1 Enabling/Disabling the Device
      2. 7.4.2 Power Good
  8. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
        1. 8.2.2.1 Custom Design With WEBENCH® Tools
        2. 8.2.2.2 Setting the Output Voltage
        3. 8.2.2.3 Output Filter Design
        4. 8.2.2.4 Inductor Selection
        5. 8.2.2.5 Input and Output Capacitor Selection
      3. 8.2.3 Application Performance Curves
  9. 9 Power Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Example
    3. 10.3 Thermal Considerations
  11. 11Device and Documentation Support
    1. 11.1 Device Support
      1. 11.1.1 Third-Party Products Disclaimer
      2. 11.1.2 Development Support
        1. 11.1.2.1 Custom Design With WEBENCH® Tools
    2. 11.2 Documentation Support
      1. 11.2.1 Related Documentation
    3. 11.3 Receiving Notification of Documentation Updates
    4. 11.4 Community Resources
    5. 11.5 Trademarks
    6. 11.6 Electrostatic Discharge Caution
    7. 11.7 Glossary
  12. 12Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

5 Pin Configuration and Functions

TLV62569 TLV62569P All_Pinout_TLV62568.gif

Pin Functions

PIN NUMBER I/O/PWR DESCRIPTION
NAME SOT23-5 SOT23-6 SOT563-6
EN 1 1 5 I Device enable logic input. Logic high enables the device, logic low disables the device and turns it into shutdown. Do not leave floating.
GND 2 2 2 PWR Ground pin.
SW 3 3 4 PWR Switch pin connected to the internal FET switches and inductor terminal. Connect the inductor of the output filter to this pin.
VIN 4 4 3 PWR Power supply voltage input.
PG - 5 6 O Power good open drain output pin for TLV62569P. The pull-up resistor should not be connected to any voltage higher than 5.5V. If it's not used, leave the pin floating.
FB 5 6 1 I Feedback pin for the internal control loop. Connect this pin to an external feedback divider.
NC - - 6 O No connection pin for TLV62569DRL. The pin can be connected to the output or the ground. Or leave it floating.