SNVSAV2B
January 2018 – November 2019
TLV6700
PRODUCTION DATA.
1
Features
2
Applications
3
Description
Device Images
Simplified Block Diagram
Output Response
4
Revision History
5
Device Comparison Table
6
Pin Configuration and Functions
Pin Functions
7
Specifications
7.1
Absolute Maximum Ratings
7.2
ESD Ratings
7.3
Recommended Operating Conditions
7.4
Thermal Information
7.5
Electrical Characteristics
7.6
Timing Requirements
7.7
Switching Characteristics
7.8
Typical Characteristics
8
Detailed Description
8.1
Overview
8.2
Functional Block Diagram
8.3
Feature Description
8.3.1
Inputs (INA+, INB–)
8.3.2
Outputs (OUTA, OUTB)
8.3.3
Window Comparator
8.3.4
Immunity to Input Terminal Voltage Transients
8.4
Device Functional Modes
8.4.1
Normal Operation (VDD > UVLO)
8.4.2
Undervoltage Lockout (V(POR) < VDD < UVLO)
8.4.3
Power-On Reset (VDD < V(POR))
9
Application and Implementation
9.1
Application Information
9.1.1
VPULLUP to a Voltage Other Than VDD
9.1.2
Monitoring VDD
9.1.3
Monitoring a Voltage Other Than VDD
9.2
Typical Application
9.2.1
Design Requirements
9.2.2
Detailed Design Procedure
9.2.2.1
Resistor Divider Selection
9.2.2.2
Pullup Resistor Selection
9.2.2.3
Input Supply Capacitor
9.2.2.4
Input Capacitors
9.2.3
Application Curves
9.3
Do's and Don'ts
10
Power Supply Recommendations
11
Layout
11.1
Layout Guidelines
11.2
Layout Example
12
Device and Documentation Support
12.1
Device Support
12.1.1
Development Support
12.2
Receiving Notification of Documentation Updates
12.3
Community Resources
12.4
Trademarks
12.5
Electrostatic Discharge Caution
12.6
Glossary
13
Mechanical, Packaging, and Orderable Information
Package Options
Mechanical Data (Package|Pins)
DDC|6
MPDS124I
DSE|6
MPDS287A
Thermal pad, mechanical data (Package|Pins)
Orderable Information
snvsav2b_oa
snvsav2b_pm
7.3
Recommended Operating Conditions
over operating temperature range (unless otherwise noted)
MIN
NOM
MAX
UNIT
V
DD
Supply voltage
1.8
18
V
V
I
Input voltage
INA+, INB–
0
6.5
V
V
O
Output voltage
OUTA, OUTB
0
18
V