SNVSAV4B
January 2018 – October 2018
TLV6710
PRODUCTION DATA.
1
Features
2
Applications
3
Description
Device Images
Simplified Block Diagram
4
Revision History
5
Device Comparison Table
6
Pin Configuration and Functions
Pin Functions
7
Specifications
7.1
Absolute Maximum Ratings
7.2
ESD Ratings
7.3
Recommended Operating Conditions
7.4
Thermal Information
7.5
Electrical Characteristics
7.6
Timing Requirements
7.7
Typical Characteristics
8
Detailed Description
8.1
Overview
8.2
Functional Block Diagram
8.3
Feature Description
8.3.1
Inputs (INA, INB)
8.3.2
Outputs (OUTA, OUTB)
8.4
Device Functional Modes
8.4.1
Normal Operation (VDD > UVLO)
8.4.2
Undervoltage Lockout (V(POR) < VDD < UVLO)
8.4.3
Power On Reset (VDD < V(POR))
9
Application and Implementation
9.1
Application Information
9.1.1
Window Comparator Considerations
9.1.2
Input and Output Configurations
9.1.3
Immunity to Input Pin Voltage Transients
9.2
Typical Application
9.2.1
Design Requirements
9.2.2
Detailed Design Procedure
9.2.3
Application Curve
9.3
Do's and Don'ts
10
Power Supply Recommendations
11
Layout
11.1
Layout Guidelines
11.2
Layout Example
12
Device and Documentation Support
12.1
Device Support
12.1.1
Development Support
12.2
Documentation Support
12.2.1
Related Documentation
12.3
Receiving Notification of Documentation Updates
12.4
Community Resources
12.5
Trademarks
12.6
Electrostatic Discharge Caution
12.7
Glossary
13
Mechanical, Packaging, and Orderable Information
Package Options
Mechanical Data (Package|Pins)
DDC|6
MPDS124I
Thermal pad, mechanical data (Package|Pins)
Orderable Information
snvsav4b_oa
snvsav4b_pm
8.3
Feature Description