SLVSA61H February   2010  – August 2016

PRODUCTION DATA.  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Revision History
  5. 5 Pin Configuration and Functions
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Typical Characteristics
  7. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Internal Current Limit
      2. 7.3.2 Shutdown
      3. 7.3.3 Dropout Voltage
      4. 7.3.4 Undervoltage Lockout (UVLO)
    4. 7.4 Device Functional Modes
      1. 7.4.1 Operation With VIN Less than 2 V
      2. 7.4.2 Operation With VIN Greater than 2 V
  8. 8 Application and Implementation
    1. 8.1 Application Information
      1. 8.1.1 Input and Output Capacitor Requirements
      2. 8.1.2 Transient Response
      3. 8.1.3 Thermal Information
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
        1. 8.2.2.1 Input Capacitance
        2. 8.2.2.2 Output Capacitance
        3. 8.2.2.3 Thermal Calculation
      3. 8.2.3 Application Curve
  9. 9 Power Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Example
  11. 11Device and Documentation Support
    1. 11.1 Related Links
    2. 11.2 Receiving Notification of Documentation Updates
    3. 11.3 Community Resources
    4. 11.4 Trademarks
    5. 11.5 Electrostatic Discharge Caution
    6. 11.6 Glossary
  12. 12Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

4 Revision History

Changes from G Revision (September 2015) to H Revision

  • Deleted all occurences of TLV70028-Q1 and TLV70032-Q1 throughout the data sheetGo
  • Added an I/O column to the Pin Functions table Go
  • Added Recommended Operating Conditions table to the data sheetGo
  • Moved "High-ESR capacitors..." sentence here from the former Board Layout Recommendations to Improve PSRR and Noise Performance section 8.1.2Go
  • Deleted the Board Layout Recommendations to Improve PSRR and Noise Performance section. Moved its non-redundant contents to Input and Output Capacitor Requirements or Layout Guidelines, as appropriateGo
  • Changed Z to R in the equations Go
  • Moved some layout information here from former Sectioni 8.1.2, Board Layout Recommendations to Improve PSRR and Noise PerformanceGo
  • Added the Receiving Notification of Documentation Updates sectionGo

Changes from F Revision (August 2013) to G Revision

  • Added Pin Configuration and Functions section, ESD Ratings table, Feature Description section, Device Functional Modes, Application and Implementation section, Power Supply Recommendations section, Layout section, Device and Documentation Support section, and Mechanical, Packaging, and Orderable Information sectionGo

Changes from E Revision (January 2013) to F Revision

  • Changed CDM classification level from C3B to C4B in FEATURES listGo
  • Changed Added TJ to the Absolute Maximum Ratings and moved TA to the Recommended Operating ConditionsGo
  • Changed Ground pin current (shutdown) max value from 2 to 2.5 in Electrical Characteristics tableGo
  • Added TLV70028-Q1 and TLV70032-Q1 to documentGo