SLVSB67C November   2011  – June 2017 TLV70012-Q1 , TLV70018-Q1

PRODUCTION DATA.  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Revision History
  5. 5 Pin Configuration and Functions
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Typical Characteristics
  7. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagrams
    3. 7.3 Feature Description
      1. 7.3.1 Internal Current Limit
      2. 7.3.2 Dropout Voltage
      3. 7.3.3 Undervoltage Lockout (UVLO)
      4. 7.3.4 Thermal Shutdown
    4. 7.4 Device Functional Modes
      1. 7.4.1 Shutdown
      2. 7.4.2 Operation with VIN Less than 2 V
      3. 7.4.3 Operation with VIN Greater than 2 V
  8. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
        1. 8.2.2.1 Input and Output Capacitor Requirements
        2. 8.2.2.2 Transient Response
      3. 8.2.3 Application Curve
  9. 9 Power Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Example
    3. 10.3 Thermal Considerations
    4. 10.4 Power Dissipation
      1. 10.4.1 Thermal Calculations
  11. 11Device and Documentation Support
    1. 11.1 Device Support
      1. 11.1.1 Package Mounting
    2. 11.2 Documentation Support
      1. 11.2.1 Related Documentation
    3. 11.3 Related Links
    4. 11.4 Receiving Notification of Documentation Updates
    5. 11.5 Community Resources
    6. 11.6 Trademarks
    7. 11.7 Electrostatic Discharge Caution
    8. 11.8 Glossary
  12. 12Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

6 Specifications

6.1 Absolute Maximum Ratings

over operating free-air temperature range, unless otherwise noted.(1)
MIN MAX UNIT
Voltage(2) IN –0.3 6.0 V
EN –0.3 6.0 V
OUT –0.3 6.0 V
Current (source) OUT Internally Limited
Output short-circuit duration Indefinite
Operating virtual junction, TJ –55 150 °C
Storage temperature, Tstg –55 150 °C
(1) Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings only, which do not imply functional operation of the device at these or any other conditions beyond those indicated under Recommended Operating Conditions. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
(2) All voltages are with respect to network ground terminal.

6.2 ESD Ratings

VALUE UNIT
V(ESD) Electrostatic discharge Human-body model (HBM), per AEC Q100-002(1) 2000 V
Charged-device model (CDM), per AEC Q100-011 750
(1) AEC Q100-002 indicates that HBM stressing shall be in accordance with the ANSI/ESDA/JEDEC JS-001 specification.

6.3 Recommended Operating Conditions

over operating free-air temperature range, unless otherwise noted.
MIN MAX UNIT
VIN Input voltage IN 2 5.5 V
VEN Enable voltage EN 0 5.5 V
VOUT Output voltage OUT 0 1.8 V
IOUT Current output 0 300 mA
TJ Operating junction temperature –40 150 °C

6.4 Thermal Information

THERMAL METRIC(1) TLV70018-Q1, TLV70012-Q1 UNIT
DDC (SOT)
5 PINS
RθJA Junction-to-ambient thermal resistance 262.8 °C/W
RθJC(top) Junction-to-case (top) thermal resistance 68.2 °C/W
RθJB Junction-to-board thermal resistance 81.6 °C/W
ψJT Junction-to-top characterization parameter 1.1 °C/W
ψJB Junction-to-board characterization parameter 80.9 °C/W
RθJC(bot) Junction-to-case (bottom) thermal resistance NA °C/W
(1) For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application report.

6.5 Electrical Characteristics

At VIN = VOUT(NOM) + 0.5 V or 2 V (whichever is greater); IOUT = 10 mA, VEN = 0.9 V, COUT = 1.0 μF, and TA = –40°C to 125°C, unless otherwise noted. Typical values are at TA = 25°C, unless otherwise noted.
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
VIN Input voltage range 2 5.5 V
VOUT DC output accuracy –40°C ≤ TA ≤ 125°C –2% 0.5% 2%
ΔVOUT/ΔVIN Line regulation VOUT(NOM) + 0.5 V ≤ VIN ≤ 5.5 V, IOUT = 10 mA 1 5 mV
ΔVOUT/ΔIOUT Load regulation 0 mA ≤ IOUT ≤ 300 mA, TLV70018-Q1 1 15 mV
0 mA ≤ IOUT ≤ 300 mA, TLV70012-Q1 1 20
ICL Output current limit VOUT = 0.9 × VOUT(NOM) 320 500 860 mA
IGND Ground pin current IOUT = 0 mA 35 55 μA
IOUT = 300 mA, VIN = VOUT + 0.5 V 370 μA
ISHDN Ground pin current (shutdown) VEN ≤ 0.4 V, VIN = 2.0 V 400 nA
VEN ≤ 0.4 V, 2.0 V ≤ VIN ≤ 4.5 V, TA = –40°C to 85°C 1 2 μA
VEN ≤ 0.4 V, 2.0 V ≤ VIN ≤ 4.5 V, TA = 85°C to 125°C 1 2.5 μA
PSRR Power-supply rejection ratio VIN = 2.3 V, VOUT = 1.8 V, IOUT = 10 mA, f = 1 kHz 68 dB
Vn Output noise voltage BW = 100 Hz to 100 kHz,
VIN = 2.3 V, VOUT = 1.8 V, IOUT = 10 mA		 48 μVRMS
tSTR Startup time(1) COUT = 1.0 μF, IOUT = 300 mA 100 μs
VEN(HI) Enable pin high (enabled) 0.9 VIN V
VEN(LO) Enable pin low (disabled) 0 0.4 V
IEN Enable pin current VIN = VEN = 5.5 V 0.04 μA
UVLO Undervoltage lockout VIN rising 1.9 V
TSD Thermal shutdown temperature Shutdown, temperature increasing 165 °C
Reset, temperature decreasing 145 °C
TA Operating temperature –40 125 °C
(1) Startup time = time from EN assertion to 0.98 × VOUT(NOM).

6.6 Typical Characteristics

Over operating temperature range (TJ = –40°C to 125°C), VIN = VOUT(NOM) + 0.5 V or 2 V, whichever is greater; IOUT = 10 mA, VEN = VIN, COUT = 1.0 μF, unless otherwise noted. Typical values are at TJ = 25°C.
TLV70018-Q1 TLV70012-Q1 tc_line_reg_10ma_lvsag6.gif
Figure 1. Line Regulation 10 mA
TLV70018-Q1 TLV70012-Q1 tc_load_reg_lvsag6.gif
Figure 3. Load Regulation
TLV70018-Q1 TLV70012-Q1 tc_ignd_vin_lvsag6.gif
Figure 5. Ground Pin Current vs Input Voltage
TLV70018-Q1 TLV70012-Q1 tc_ignd-tmp_lvsag6.gif
Figure 7. Ground Pin Current vs Temperature
TLV70018-Q1 TLV70012-Q1 tc_ilim-vin_lvsag6.gif
Figure 9. Current Limit vs Input Voltage
TLV70018-Q1 TLV70012-Q1 tc_psrr-vin_lvsag6.gif
Figure 11. Power-Supply Ripple Rejection vs Input Voltage
TLV70018-Q1 TLV70012-Q1 tc_load_tran_200_lvsag6.gif
Figure 13. Load Transient Response
TLV70018-Q1 TLV70012-Q1 tc_load_tran_50_lvsag6.gif
Figure 15. Load Transient Response
TLV70018-Q1 TLV70012-Q1 tc_line_tran_300ma_lvsag6.gif
Figure 17. Line Transient Response
TLV70018-Q1 TLV70012-Q1 tc_line_tran_55v_lvsag6.gif
Figure 19. Line Transient Response
TLV70018-Q1 TLV70012-Q1 tc_line_reg_300ma_lvsag6.gif
Figure 2. Line Regulation 300 mA
TLV70018-Q1 TLV70012-Q1 tc_vout-tmp_lvsag6.gif
Figure 4. Output Voltage vs Temperature
TLV70018-Q1 TLV70012-Q1 tc_ignd_iout_lvsag6.gif
Figure 6. Ground Pin Current vs Load
TLV70018-Q1 TLV70012-Q1 tc_ishdn-vin_lvsag6.gif
Figure 8. Shutdown Current vs Input Voltage
TLV70018-Q1 TLV70012-Q1 tc_psrr_fqcy_05v_lvsa00.gif
Figure 10. Power-Supply Ripple Rejection vs Frequency
TLV70018-Q1 TLV70012-Q1 tc_noise-frq_lvsag6.gif
Figure 12. Output Spectral Noise Density vs Frequency
TLV70018-Q1 TLV70012-Q1 tc_load_tran_10_lvsag6.gif
Figure 14. Load Transient Response
TLV70018-Q1 TLV70012-Q1 tc_load_tran_300_lvsag6.gif
Figure 16. Load Transient Response
TLV70018-Q1 TLV70012-Q1 tc_line_tran_1ma_lvsag6.gif
Figure 18. Line Transient Response
TLV70018-Q1 TLV70012-Q1 tc_ramp_up_down_lvsag6.gif
Figure 20. VIN Ramp Up, Ramp Down Response