SBVS161 Data sheet | TI.com

SBVS161A november 2011 – april 2023 TLV701

PRODUCTION DATA

Package Options

Mechanical Data (Package|Pins)

DBV|5
- MPDS018T

Thermal pad, mechanical data (Package|Pins)

Orderable Information

6.6 Typical Characteristics

at operating temperature T_J = 25°C, V_IN = V_OUT(NOM) + 1.0 V or 2.5 V (whichever is greater), I_OUT = 1 mA, C_IN = 1 µF, and C_OUT = 1 µF (unless otherwise noted)

Figure 6-1 Line Regulation (V_OUT = 3.0 V) for Legacy Chip

Figure 6-3 Load Regulation (V_OUT = 3.0 V) for Legacy Chip

Figure 6-5 Output Voltage vs Junction Temperature for
Legacy Chip

Figure 6-7 Dropout Voltage vs Input Voltage (V_OUT = 3.0 V) for Legacy Chip

Figure 6-9 Dropout Voltage vs Output Current for Legacy Chip

Figure 6-11 Ground Current vs Junction Temperature for Legacy Chip

Figure 6-13 Ground Pin Current vs Load Current for
Legacy Chip

Figure 6-15 Ground Pin Current vs Input Voltage for New Chip

Figure 6-17 Current Limit vs Junction Temperature for
New Chip

Figure 6-19 Output Spectral Noise Density vs Frequency for New Chip

Figure 6-21 Power-Supply Ripple Rejection vs Frequency for New Chip

Figure 6-23 Line Transient Response for New Chip

Figure 6-25 Load Transient Response for New Chip

Figure 6-2 Line Regulation (V_OUT = 3.3 V) for New Chip

Figure 6-4 Load Regulation (V_OUT = 3.3 V) for New Chip

Figure 6-6 Output Voltage vs Junction Temperature for
New Chip

Figure 6-8 Dropout Voltage vs Input Voltage (V_OUT = 3.3 V) for New Chip

Figure 6-10 Dropout Voltage vs Output Current for New Chip

Figure 6-12 Ground Current vs Junction Temperature for
New Chip

Figure 6-14 Ground Pin Current vs Load Current for New Chip

Figure 6-16 Current Limit vs Junction Temperature for
Legacy Chip

Figure 6-18 Output Spectral Noise Density vs Frequency for Legacy Chip

Figure 6-20 Power-Supply Ripple Rejection vs Frequency for Legacy Chip

Figure 6-22 Line Transient Response for Legacy Chip

Figure 6-24 Load Transient Response for Legacy Chip

Figure 6-26 Power-Up, Power-Down for New Chip