SLVSC35D August   2013  – July 2019 TLV702-Q1

PRODUCTION DATA.  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
    1.     Device Images
      1.      Typical Application
  4. 4 Revision History
  5. 5 Pin Configuration and Functions
    1.     Pin Functions
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Typical Characteristics
  7. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagrams
    3. 7.3 Feature Description
      1. 7.3.1 Internal Current Limit
      2. 7.3.2 Shutdown
      3. 7.3.3 Dropout Voltage
      4. 7.3.4 Undervoltage Lockout
    4. 7.4 Device Functional Modes
      1. 7.4.1 Normal Operation
      2. 7.4.2 Dropout Operation
  8. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
        1. 8.2.2.1 Input and Output Capacitor Requirements
        2. 8.2.2.2 Transient Response
      3. 8.2.3 Application Curves
  9. 9 Power Supply Recommendations
    1. 9.1 Power Dissipation
  10. 10Layout
    1. 10.1 Layout Guidelines
      1. 10.1.1 Thermal Consideration
      2. 10.1.2 Package Mounting
    2. 10.2 Layout Examples
  11. 11Device and Documentation Support
    1. 11.1 Device Support
      1. 11.1.1 Development Support
        1. 11.1.1.1 Spice Models
      2. 11.1.2 Device Nomenclature
    2. 11.2 Documentation Support
      1. 11.2.1 Related Documentation
    3. 11.3 Receiving Notification of Documentation Updates
    4. 11.4 Community Resources
    5. 11.5 Trademarks
    6. 11.6 Electrostatic Discharge Caution
    7. 11.7 Glossary
  12. 12Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

6.5 Electrical Characteristics

At VIN = VOUT(nom) + 0.5 V or 2 V (whichever is greater); IOUT = 10 mA, VEN = 0.9 V, COUT = 1 μF, and TJ, TA = –40°C to +125°C, unless otherwise noted. Typical values are at TJ = 25°C.
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
DC output accuracy –2% 0.5% 2%
ΔVO(ΔVI) Line regulation VOUT(nom) + 0.5 V ≤ VIN ≤ 5.5 V,
IOUT = 10 mA		 1 5 mV
ΔVO(ΔIO) Load regulation 0 mA ≤ IOUT ≤ 300 mA 1 15 mV
VDO Dropout voltage(1) VIN = 0.98 × VOUT(nom), IOUT = 300 mA 260 375 mV
ICL Output current limit VOUT = 0.9 × VOUT(nom) 320 500 860 mA
IGND Ground pin current IOUT = 0 mA 35 55 μA
IOUT = 300 mA, VIN = VOUT + 0.5 V 370 μA
ISHDN Ground pin current (shutdown) VEN ≤ 0.4 V, VIN = 2 V 400 nA
VEN ≤ 0.4 V, 2 V ≤ VIN ≤ 4.5 V 1 2.5 μA
PSRR Power-supply rejection ratio VIN = 2.3 V, VOUT = 1.8 V,
IOUT = 10 mA, f = 1 kHz		 68 dB
Vn Output noise voltage BW = 100 Hz to 100 kHz,
VIN = 2.3 V, VOUT = 1.8 V, IOUT = 10 mA		 48 μVRMS
tSTR Start-up time(2) COUT = 1 μF, IOUT = 300 mA 100 μs
VEN(high) Enable pin high (enabled) 0.9 VIN V
VEN(low) Enable pin low (disabled) 0 0.4 V
IEN Enable pin current VIN = VEN = 5.5 V 0.04 μA
UVLO Undervoltage lockout VIN rising 1.9 V
Tsd Thermal shutdown temperature Shutdown, temperature increasing 165 °C
Reset, temperature decreasing 145 °C
(1) VDO is measured for devices with VOUT(nom) ≥ 2.35 V.
(2) Start-up time = time from EN assertion to 0.98 × VOUT(nom).