SBVS148F September   2010  – March 2023 TLV704

PRODUCTION DATA  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Revision History
  5. 5 Pin Configuration and Functions
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4.     Thermal Information
    5. 6.4 Electrical Characteristics
    6. 6.5 Typical Characteristics
  7. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Wide Supply Range
      2. 7.3.2 Low Quiescent Current
      3. 7.3.3 Dropout Voltage (VDO)
      4. 7.3.4 Current Limit
    4. 7.4 Device Functional Modes
      1. 7.4.1 Normal Operation
      2. 7.4.2 Dropout Operation
  8. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
        1. 8.2.2.1 External Capacitor Requirements
        2. 8.2.2.2 Input and Output Capacitor Requirements
        3. 8.2.2.3 Reverse Current
        4. 8.2.2.4 Power Dissipation (PD)
        5. 8.2.2.5 Estimating Junction Temperature
      3. 8.2.3 Application Curves
    3. 8.3 Best Design Practices
    4. 8.4 Power Supply Recommendations
    5. 8.5 Layout
      1. 8.5.1 Layout Guidelines
        1. 8.5.1.1 Power Dissipation
      2. 8.5.2 Layout Example
  9. 9 Device and Documentation Support
    1. 9.1 Device Support
      1. 9.1.1 Development Support
        1. 9.1.1.1 Evaluation Module
      2. 9.1.2 Device Nomenclature
    2. 9.2 Documentation Support
      1. 9.2.1 Related Documentation
    3. 9.3 Receiving Notification of Documentation Updates
    4. 9.4 Support Resources
    5. 9.5 Trademarks
    6. 9.6 Electrostatic Discharge Caution
    7. 9.7 Glossary
  10. 10Mechanical, Packaging, and Orderable Information

Package Options

Refer to the PDF data sheet for device specific package drawings

Mechanical Data (Package|Pins)
  • DBV|5
Thermal pad, mechanical data (Package|Pins)
Orderable Information

6.5 Typical Characteristics

at operating temperature TJ = 25°C, VIN = VOUT(NOM) + 1.0 V or 2.5 V (whichever is greater), IOUT = 1 mA, CIN = 1 µF, and COUT = 1 µF (unless otherwise noted)

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Figure 6-1 Line Regulation for Legacy Chip
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Figure 6-3 Load Regulation (VOUT = 3.3 V) for Legacy Chip
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Figure 6-5 Output Voltage vs Junction Temperature for
Legacy Chip
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Figure 6-7 Dropout Voltage vs Input Voltage (TLV70433) for Legacy Chip
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Figure 6-9 Dropout Voltage vs Output Current for Legacy Chip
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Figure 6-11 Ground Current vs Junction Temperature for Legacy Chip
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Figure 6-13 Ground Pin Current vs Input Voltage for
Legacy Chip
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Figure 6-15 Ground Pin Current vs Load Current for
Legacy Chip
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Figure 6-17 Current Limit vs Junction Temperature for
Legacy Chip
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Figure 6-19 Output Spectral Noise Density vs Frequency for Legacy Chip
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Figure 6-21 Power-Supply Ripple Rejection vs Frequency for Legacy Chip
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Figure 6-23 Power-Up, Power-Down for Legacy Chip
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Figure 6-25 Line Transient Response for Legacy Chip
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Figure 6-27 Load Transient Response for Legacy Chip
 
Figure 6-29 Line Transient Response for New Chip
 
Figure 6-2 Line Regulation for New Chip
 
Figure 6-4 Load Regulation (VOUT = 3.3 V) for New Chip
 
Figure 6-6 Output Voltage vs Junction Temperature for
New Chip
 
Figure 6-8 Dropout Voltage vs Input Voltage (TLV70433) for New Chip
 
Figure 6-10 Dropout Voltage vs Output Current for New Chip
 
Figure 6-12 Ground Current vs Junction Temperature for
New Chip
 
Figure 6-14 Ground Pin Current vs Input Voltage for New Chip
 
Figure 6-16 Ground Pin Current vs Load Current for New Chip
 
Figure 6-18 Current Limit vs Junction Temperature for
New Chip
 
Figure 6-20 Output Spectral Noise Density vs Frequency for New Chip
 
Figure 6-22 Power-Supply Ripple Rejection vs Frequency for New Chip
 
Figure 6-24 Power-Up, Power-Down for New Chip
 
Figure 6-26 Line Transient Response for New Chip
 
Figure 6-28 Load Transient Response for New Chip
 
Figure 6-30 Dropout Exit Transient Response for New Chip