SBVS148F September 2010 – March 2023 TLV704
PRODUCTION DATA
Refer to the PDF data sheet for device specific package drawings
PARAMETER | TEST CONDITIONS | MIN | TYP | MAX | UNIT | ||
---|---|---|---|---|---|---|---|
VIN | Input voltage range (1) | TJ = 25°C | 24 | V | |||
VOUT | Output voltage range (1) | TJ = 25°C | 1.2 | 5 | V | ||
VOUT | DC output accuracy(1) | TJ = 25°C | –2 | 2 | % | ||
IGND | Ground pin current (legacy chip) (3) | IOUT = 0 mA, TJ = 25°C | 3.2 | 4.5 | μA | ||
IOUT = 100 mA, TJ = 25°C | 3.2 | 5.5 | |||||
Ground pin current (new chip)(3) | IOUT = 0 mA, TJ = 25°C | 3.2 | 4.1 | ||||
IOUT = 100 mA, TJ = 25°C | 3.4 | 4.5 | |||||
ΔVOUT(ΔIOUT) | Load regulation | VOUT < 3.3V, 0 < IOUT < 10 mA , TJ = 25°C | 10 | mV | |||
VOUT < 3.3V, 0 < IOUT < 50 mA , TJ = 25°C | 25 | ||||||
VOUT < 3.3V, 0 < IOUT < 100 mA , TJ = 25°C | 33 | 50 | |||||
VOUT ≥ 3.3 V, 0 < IOUT < 10 mA , TJ = 25°C | 7 | ||||||
VOUT ≥ 3.3 V, 0 < IOUT < 50 mA , TJ = 25°C | 35 | ||||||
VOUT ≥ 3.3 V, 0 < IOUT < 100 mA , TJ = 25°C | 50 | 75 | |||||
ΔVOUT(ΔVIN) | Line regulation (1) | VOUT(NOM) + 1 V ≤ VIN ≤ 24 V , TJ = 25°C | 20 | 50 | mV | ||
ICL | Output current limit (legacy chip) | VOUT = 0 V , TJ = 25°C | 160 | 1000 | mA | ||
Output current limit (new chip) | 160 | 500 | |||||
PSRR | Power-supply ripple rejection | f = 100 kHz, COUT = 10 μF | 60 | dB | |||
VDO | Dropout voltage | VIN = VOUT(nom) – 0.1 V, IOUT = 10 mA , TJ = 25°C | 75 | mV | |||
VIN = VOUT(nom) – 0.1 V, IOUT = 50 mA , TJ = 25°C | 400 | ||||||
VIN = VOUT(nom) – 0.1 V, IOUT = 100 mA , TJ = 25°C | 850 | 1100 | |||||
TJ | Operating junction temperature | –40 | 125 | ℃ |