SLVSFO5D
April 2020 – January 2023
TLV841
PRODUCTION DATA
1
Features
2
Applications
3
Description
4
Revision History
5
Device Comparison
6
Pin Configuration and Functions
7
Specifications
7.1
Absolute Maximum Ratings
7.2
ESD Ratings
7.3
Recommended Operating Conditions
7.4
Thermal Information
7.5
Electrical Characteristics
7.6
Timing Requirements
7.7
Timing Diagrams
7.8
Typical Characteristics
8
Detailed Description
8.1
Overview
8.2
Functional Block Diagram
8.3
Feature Description
8.3.1
Input Voltage (VDD)
8.3.1.1
VDD Hysteresis
8.3.1.2
VDD Transient Immunity
8.3.2
SENSE Input (TLV841S)
8.3.2.1
SENSE Hysteresis
8.3.2.2
Immunity to SENSE Pin Voltage Transients
8.3.3
User-Programmable Reset Time Delay for TLV841C only
8.3.4
Manual Reset (MR) Input for TLV841M only
8.3.5
Output Logic
8.3.5.1
RESET Output, Active-Low
8.3.5.2
RESET Output, Active-High
8.4
Device Functional Modes
8.4.1
Normal Operation (VDD > VPOR)
8.4.2
Below Power-On-Reset (VDD < VPOR)
9
Application and Implementation
9.1
Application Information
9.2
Typical Application
9.2.1
Design Requirements
9.2.2
Detailed Design Procedure
9.2.3
Application Curves: TLV841EVM
10
Power Supply Recommendations
11
Layout
11.1
Layout Guidelines
11.2
Layout Example
12
Device and Documentation Support
12.1
Device Nomenclature
12.2
Documentation Support
12.2.1
Related Documentation
12.3
Receiving Notification of Documentation Updates
12.4
Support Resources
12.5
Trademarks
12.6
Electrostatic Discharge Caution
12.7
Glossary
13
Mechanical, Packaging, and Orderable Information
Package Options
Mechanical Data (Package|Pins)
YBH|4
MXBG407
Thermal pad, mechanical data (Package|Pins)
Orderable Information
slvsfo5d_oa
slvsfo5d_pm
12
Device and Documentation Support