SBOS980E may   2019  – april 2023 TLV9001-Q1 , TLV9002-Q1 , TLV9004-Q1

PRODMIX  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Revision History
  5. 5 Device Comparison Table
  6. 6 Pin Configuration and Functions
  7. 7 Specifications
    1. 7.1 Absolute Maximum Ratings
    2. 7.2 ESD Ratings
    3. 7.3 Recommended Operating Conditions
    4. 7.4 Thermal Information for Single Channel
    5. 7.5 Thermal Information for Dual Channel
    6. 7.6 Thermal Information for Quad Channel
    7. 7.7 Electrical Characteristics
    8. 7.8 Typical Characteristics
  8. 8 Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1 Operating Voltage
      2. 8.3.2 Rail-to-Rail Input
      3. 8.3.3 Rail-to-Rail Output
      4. 8.3.4 Overload Recovery
    4. 8.4 Device Functional Modes
  9. 9 Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Application
      1. 9.2.1 TLV900x-Q1 Low-Side, Current Sensing Application
        1. 9.2.1.1 Design Requirements
        2. 9.2.1.2 Detailed Design Procedure
        3. 9.2.1.3 Application Curve
      2. 9.2.2 Single-Supply Photodiode Amplifier
        1. 9.2.2.1 Design Requirements
        2. 9.2.2.2 Detailed Design Procedure
        3. 9.2.2.3 Application Curves
    3. 9.3 Power Supply Recommendations
      1. 9.3.1 Input and ESD Protection
    4. 9.4 Layout
      1. 9.4.1 Layout Guidelines
      2. 9.4.2 Layout Example
  10. 10Device and Documentation Support
    1. 10.1 Documentation Support
      1. 10.1.1 Related Documentation
    2. 10.2 Receiving Notification of Documentation Updates
    3. 10.3 Support Resources
    4. 10.4 Trademarks
    5. 10.5 Electrostatic Discharge Caution
    6. 10.6 Glossary
  11. 11Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

6 Pin Configuration and Functions

GUID-58A2EDD2-DB57-472A-A3B5-84AE7B42315A-low.svgFigure 6-1 TLV9001-Q1 DBV Package,
5-Pin SOT-23
(Top View)
GUID-C1B96E2B-930C-41B9-9086-3EA7BD6951F2-low.svgFigure 6-2 TLV9001-Q1 DCK Package,
5-Pin SC70
(Top View)
Table 6-1 Pin Functions: TLV9001-Q1
PIN TYPE(1) DESCRIPTION
NAME SOT-23 SC70
IN– 4 3 I Inverting input
IN+ 3 1 I Noninverting input
OUT 1 4 O Output
V– 2 2 I or — Negative (low) supply or ground (for single-supply operation)
V+ 5 5 I Positive (high) supply
(1) I = input, O = output
GUID-8E9A7C42-C6DA-4C20-BA20-2C6217D23BF8-low.svg Figure 6-3 TLV9002-Q1 D, DGK, PW Packages,
8-Pin SOIC, VSSOP, TSSOP
(Top View)
Table 6-2 Pin Functions: TLV9002-Q1
PIN TYPE(1) DESCRIPTION
NAME NO.
IN1– 2 I Inverting input, channel 1
IN1+ 3 I Noninverting input, channel 1
IN2– 6 I Inverting input, channel 2
IN2+ 5 I Noninverting input, channel 2
OUT1 1 O Output, channel 1
OUT2 7 O Output, channel 2
V– 4 I or — Negative (low) supply or ground (for single-supply operation)
V+ 8 I Positive (high) supply
(1) I = input, O = output
GUID-D093D7D3-F7EA-4AE5-B57C-205EFD8C8407-low.svg Figure 6-4 TLV9004-Q1 D, PW, DYY Packages,
14-Pin SOIC, TSSOP, SOT-23
(Top View)
Table 6-3 Pin Functions: TLV9004-Q1
PIN TYPE(1) DESCRIPTION
NAME NO.
IN1– 2 I Inverting input, channel 1
IN1+ 3 I Noninverting input, channel 1
IN2– 6 I Inverting input, channel 2
IN2+ 5 I Noninverting input, channel 2
IN3– 9 I Inverting input, channel 3
IN3+ 10 I Noninverting input, channel 3
IN4– 13 I Inverting input, channel 4
IN4+ 12 I Noninverting input, channel 4
NC — — No internal connection
OUT1 1 O Output, channel 1
OUT2 7 O Output, channel 2
OUT3 8 O Output, channel 3
OUT4 14 O Output, channel 4
V– 11 I or — Negative (low) supply or ground (for single-supply operation)
V+ 4 I Positive (high) supply
(1) I = input, O = output