SBOSAH8B February   2024  – May 2024 TLV9051-Q1 , TLV9052-Q1

PRODMIX  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Pin Configuration and Functions
  6. 5 Specifications
    1. 5.1 Absolute Maximum Ratings
    2. 5.2 ESD Ratings
    3. 5.3 Recommended Operating Conditions
    4. 5.4 Thermal Information for Single Channel
    5. 5.5 Thermal Information for Dual Channel
    6. 5.6 Thermal Information for Quad Channel
    7. 5.7 Electrical Characteristics: VS (Total Supply Voltage) = (V+) – (V–) = 1.8V to 5.5V
    8. 5.8 Typical Characteristics
  7. 6 Detailed Description
    1. 6.1 Overview
    2. 6.2 Functional Block Diagram
    3. 6.3 Feature Description
      1. 6.3.1 Operating Voltage
      2. 6.3.2 Rail-to-Rail Input
      3. 6.3.3 Rail-to-Rail Output
      4. 6.3.4 EMI Rejection
      5. 6.3.5 Overload Recovery
      6. 6.3.6 Electrical Overstress
      7. 6.3.7 Input Protection
    4. 6.4 Device Functional Modes
  8. 7 Application and Implementation
    1. 7.1 Application Information
    2. 7.2 Typical Low-Side Current Sense Application
      1. 7.2.1 Design Requirements
      2. 7.2.2 Detailed Design Procedure
      3. 7.2.3 Application Curve
    3. 7.3 Power Supply Recommendations
    4. 7.4 Layout
      1. 7.4.1 Layout Guidelines
      2. 7.4.2 Layout Example
  9. 8 Device and Documentation Support
    1. 8.1 Device Support
      1. 8.1.1 Development Support
        1. 8.1.1.1 TINA-TI (Free Software Download)
    2. 8.2 Documentation Support
      1. 8.2.1 Related Documentation
    3. 8.3 Receiving Notification of Documentation Updates
    4. 8.4 Support Resources
    5. 8.5 Trademarks
    6. 8.6 Electrostatic Discharge Caution
    7. 8.7 Glossary
  10. 9 Revision History
  11. 10Mechanical, Packaging, and Orderable Information

Package Options

Refer to the PDF data sheet for device specific package drawings

Mechanical Data (Package|Pins)
  • DBV|5
Thermal pad, mechanical data (Package|Pins)
Orderable Information

5.7 Electrical Characteristics: VS (Total Supply Voltage) = (V+) – (V–) = 1.8V to 5.5V

at TA = 25°C, RL = 10kΩ connected to VS / 2, VCM = VS / 2, and VOUT = VS / 2 (unless otherwise noted);
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
OFFSET VOLTAGE
VOS Input offset voltage VS = 5V ±0.33 ±1.85 mV
VS = 5V, TA = –40°C to +125°C ±2.24
dVOS/dT Drift VS = 5V, TA = –40°C to +125°C ±0.5 µV/°C
PSRR Power-supply rejection ratio VS = 1.8V – 5.5V, VCM = (V–) ±13 ±80 µV/V
Channel separation, dc At dc 115 dB
INPUT VOLTAGE RANGE
VCM Common-mode voltage VS = 1.8V to 5.5V (V–) – 0.1 (V+) + 0.1 V
CMRR Common-mode rejection ratio VS = 5.5V, (V–) – 0.1V < VCM < (V+) – 1.4V,
TA = –40°C to +125°C		 80 96 dB
VS = 5.5V, VCM = –0.1V to 5.6V,
TA = –40°C to +125°C		 62 79
VS = 1.8V, (V–) – 0.1V < VCM < (V+) – 1.4V,
TA = –40°C to +125°C		 88
VS = 1.8V, VCM = –0.1V to 1.9V,
TA = –40°C to +125°C		 72
INPUT BIAS CURRENT
IB Input bias current ±2 ±18(2) pA
TA = –40°C to +125°C ±750(2) pA
IOS Input offset current ±1 ±15(2) pA
TA = –40°C to +125°C ±440(2) pA
NOISE
En Input voltage noise (peak-to-peak) VS = 5V, f = 0.1Hz to 10Hz 6 µVPP
en Input voltage noise density VS = 5V, f = 10kHz 15 nV/√Hz
VS = 5V, f = 1kHz 20 nV/√Hz
in Input current noise density f = 1kHz 18 fA/√Hz
INPUT CAPACITANCE
CID Differential 2 pF
CIC Common-mode 4 pF
OPEN-LOOP GAIN
AOL Open-loop voltage gain VS = 1.8V, (V–) + 0.04V < VO < (V+) – 0.04V,
RL = 10kΩ		 106 dB
VS = 5.5V, (V–) + 0.05V < VO < (V+) – 0.05V,
RL = 10kΩ		 104 128
VS = 1.8V, (V–) + 0.06V < VO < (V+) – 0.06V,
RL = 2kΩ		 108
VS = 5.5V, (V–) + 0.15V < VO < (V+) – 0.15V,
RL = 2kΩ		 130
FREQUENCY RESPONSE
GBP Gain bandwidth product VS = 5.5V, G = +1 5 MHz
φm Phase margin VS = 5.5V, G = +1 60 Degrees
SR Slew rate VS = 5.5V, G = +1, CL = 130pF 15 V/µs
tS Settling time To 0.1%, VS = 5.5V, 2V step , G = +1, CL = 100pF 0.75 µs
To 0.01%, VS = 5.5V, 2V step , G = +1, CL = 100pF 1
tOR Overload recovery time VS = 5.5V, VIN  × gain > VS 0.3 µs
THD + N Total harmonic distortion + noise(1) VS = 5.5V, VCM = 2.5V, VO = 1VRMS, G = +1, f = 1kHz 0.0006%
OUTPUT
VO Voltage output swing from supply rails VS = 5.5V, RL = 10kΩ, 16 mV
VS = 5.5V, RL = 2kΩ, 40
ISC Short-circuit current VS = 5V ±50 mA
ZO Open-loop output impedance VS = 5V, f = 5MHz 250 Ω
POWER SUPPLY
IQ Quiescent current per amplifier VS = 5.5V, IO = 0mA, 330 450 µA
VS = 5.5V, IO = 0mA, TA = –40°C to +125°C 475
(1) Third-order filter; bandwidth = 80kHz at –3dB.
(2) Specified by design and characterization; not production tested.