SBOS942J
August 2018 – February 2024
TLV9051
,
TLV9052
,
TLV9054
PRODUCTION DATA
1
1
Features
2
Applications
3
Description
4
Device Comparison Table
5
Pin Configuration and Functions
6
Specifications
6.1
Absolute Maximum Ratings
6.2
ESD Ratings
6.3
Recommended Operating Conditions
6.4
Thermal Information for Single Channel
6.5
Thermal Information for Dual Channel
6.6
Thermal Information for Quad Channel
6.7
Electrical Characteristics: VS (Total Supply Voltage) = (V+) – (V–) = 1.8 V to 5.5 V
6.8
Typical Characteristics
7
Detailed Description
7.1
Overview
7.2
Functional Block Diagram
7.3
Feature Description
7.3.1
Operating Voltage
7.3.2
Rail-to-Rail Input
7.3.3
Rail-to-Rail Output
7.3.4
EMI Rejection
7.3.5
Overload Recovery
7.3.6
Packages With an Exposed Thermal Pad
7.3.7
Electrical Overstress
7.3.8
Input Protection
7.3.9
Shutdown Function
7.4
Device Functional Modes
8
Application and Implementation
8.1
Application Information
8.2
Typical Low-Side Current Sense Application
8.2.1
Design Requirements
8.2.2
Detailed Design Procedure
8.2.3
Application Curve
8.3
Power Supply Recommendations
8.4
Layout
8.4.1
Layout Guidelines
8.4.2
Layout Example
9
Device and Documentation Support
9.1
Documentation Support
9.1.1
Related Documentation
9.2
Receiving Notification of Documentation Updates
9.3
Support Resources
9.4
Trademarks
9.5
Electrostatic Discharge Caution
9.6
Glossary
10
Revision History
11
Mechanical, Packaging, and Orderable Information
Package Options
Mechanical Data (Package|Pins)
DPW|5
MPSS088
DCK|5
MPDS025J
DBV|5
MPDS018T
DBV|6
MPDS026Q
Thermal pad, mechanical data (Package|Pins)
DPW|5
QFND567C
Orderable Information
sbos942j_oa
sbos942j_pm
8.4.2
Layout Example
Figure 8-3
Schematic Representation for
Figure 8-4
Figure 8-4
Layout Example