SBOS942J August   2018  – February 2024 TLV9051 , TLV9052 , TLV9054

PRODUCTION DATA  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Device Comparison Table
  6. 5 Pin Configuration and Functions
  7. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information for Single Channel
    5. 6.5 Thermal Information for Dual Channel
    6. 6.6 Thermal Information for Quad Channel
    7. 6.7 Electrical Characteristics: VS (Total Supply Voltage) = (V+) – (V–) = 1.8 V to 5.5 V
    8. 6.8 Typical Characteristics
  8. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Operating Voltage
      2. 7.3.2 Rail-to-Rail Input
      3. 7.3.3 Rail-to-Rail Output
      4. 7.3.4 EMI Rejection
      5. 7.3.5 Overload Recovery
      6. 7.3.6 Packages With an Exposed Thermal Pad
      7. 7.3.7 Electrical Overstress
      8. 7.3.8 Input Protection
      9. 7.3.9 Shutdown Function
    4. 7.4 Device Functional Modes
  9. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Low-Side Current Sense Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
      3. 8.2.3 Application Curve
    3. 8.3 Power Supply Recommendations
    4. 8.4 Layout
      1. 8.4.1 Layout Guidelines
      2. 8.4.2 Layout Example
  10. 9 Device and Documentation Support
    1. 9.1 Documentation Support
      1. 9.1.1 Related Documentation
    2. 9.2 Receiving Notification of Documentation Updates
    3. 9.3 Support Resources
    4. 9.4 Trademarks
    5. 9.5 Electrostatic Discharge Caution
    6. 9.6 Glossary
  11. 10Revision History
  12. 11Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

6.5 Thermal Information for Dual Channel

THERMAL METRIC(1)TLV9052, TLV9052SUNIT
D
(SOIC)		DGK
(VSSOP)		DSG
(WSON)		PW
(TSSOP)		DDF
(SOT-23)		DGS
(VSSOP)		RUG
(X2QFN)
8 PINS8 PINS8 PINS8 PINS8 PINS10 PINS10 PINS
RθJAJunction-to-ambient thermal resistance155.4208.8102.3205.1184.4170.4197.2°C/W
RθJC(top)Junction-to-case(top) thermal resistance95.593.3120.093.7112.884.993.3°C/W
RθJBJunction-to-board thermal resistance98.9130.768.2135.799.9113.5123.8°C/W
ψJTJunction-to-top characterization parameter41.926.115.125.018.716.43.7°C/W
ψJBJunction-to-board characterization parameter98.1128.968.2134.099.3112.3120.2°C/W
RθJC(bot)Junction-to-case(bottom) thermal resistanceN/AN/A43.6N/AN/AN/AN/A°C/W
(1) For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application report.