SBOSA23 Data sheet | TI.com

SBOSA23G May 2020 – March 2024 TLV9151-Q1 , TLV9152-Q1 , TLV9154-Q1

PRODUCTION DATA

Package Options

Mechanical Data (Package|Pins)

DYY|14
- MPSS114C
PW|14
- MPDS360A
D|14
- MPDS177H

Thermal pad, mechanical data (Package|Pins)

Orderable Information

5.8 Typical Characteristics

at T_A = 25°C, V_S = ±8 V, V_CM = V_S / 2, R_LOAD = 10 kΩ connected to V_S / 2, and C_L = 10 pF (unless otherwise noted)

Distribution from 15462 amplifiers, T_A = 25°C

Figure 5-1 Offset Voltage Production Distribution

V_CM = V+

Figure 5-3 Offset Voltage vs Temperature

T_A = 25°C

Figure 5-5 Offset Voltage vs Common-Mode Voltage

T_A = 125°C

Figure 5-7 Offset Voltage vs Common-Mode Voltage

Figure 5-9 Offset Voltage vs Power Supply

Figure 5-11 Closed-Loop Gain vs Frequency

Figure 5-13 Input Bias Current vs Temperature

Figure 5-15 Output Voltage Swing vs Output Current (Sinking)

f = 0 Hz

Figure 5-17 CMRR vs Temperature (dB)

Figure 5-19 0.1-Hz to 10-Hz Noise

BW = 80 kHz, V_OUT = 1 V_RMS

Figure 5-21 THD+N Ratio vs Frequency

V_CM = V–

Figure 5-23 Quiescent Current vs Supply Voltage

Figure 5-25 Open-Loop Voltage Gain vs Temperature (dB)

G = –1, 10-mV output step

Figure 5-27 Small-Signal Overshoot vs Capacitive Load

Figure 5-29 Phase Margin vs Capacitive Load

G = –10

Figure 5-31 Positive Overload Recovery

C_L = 20 pF, G = 1, 20-mV step response

Figure 5-33 Small-Signal Step Response, Rising

C_L = 20 pF, G = 1

Figure 5-35 Large-Signal Step Response (Rising)

C_L = 20 pF, G = –1

Figure 5-37 Large-Signal Step Response

Figure 5-39 Maximum Output Voltage vs Frequency

Figure 5-41 EMIRR (Electromagnetic Interference Rejection Ratio) at Inputs vs Frequency

Distribution from 60 amplifiers

Figure 5-2 Offset Voltage Drift Distribution

V_CM = V–

Figure 5-4 Offset Voltage vs Temperature

T_A = 25°C

Figure 5-6 Offset Voltage vs Common-Mode Voltage (Transition Region)

T_A = –40°C

Figure 5-8 Offset Voltage vs Common-Mode Voltage

C_L = 20 pF

Figure 5-10 Open-Loop Gain and Phase vs Frequency

Figure 5-12 Input Bias Current vs Common-Mode Voltage

Figure 5-14 Output Voltage Swing vs Output Current (Sourcing)

Figure 5-16 CMRR and PSRR vs Frequency

f = 0 Hz

Figure 5-18 PSRR vs Temperature (dB)

Figure 5-20 Input Voltage Noise Spectral Density vs Frequency

BW = 80 kHz, f = 1 kHz

Figure 5-22 THD+N vs Output Amplitude

Figure 5-24 Quiescent Current vs Temperature

Figure 5-26 Open-Loop Output Impedance vs Frequency

G = 1, 10-mV output step

Figure 5-28 Small-Signal Overshoot vs Capacitive Load

V_IN = ±8 V; V_S = V_OUT = ±8 V

Figure 5-30 No Phase Reversal

G = –10

Figure 5-32 Negative Overload Recovery

C_L = 20 pF, G = -1, 20-mV step response

Figure 5-34 Small-Signal Step Response

C_L = 20 pF, G = 1

Figure 5-36 Large-Signal Step Response (Falling)

Figure 5-38 Short-Circuit Current vs Temperature

Figure 5-40 Channel Separation vs Frequency