SBOSA68D November   2021  – March 2024 TLV9161 , TLV9162 , TLV9164

PRODUCTION DATA  

  1.   1
  2. Features
  3. Applications
  4. Description
  5. Pin Configuration and Functions
  6. Specifications
    1. 5.1 Absolute Maximum Ratings
    2. 5.2 ESD Ratings
    3. 5.3 Recommended Operating Conditions
    4. 5.4 Thermal Information for Single Channel
    5. 5.5 Thermal Information for Dual Channel
    6. 5.6 Thermal Information for Quad Channel
    7. 5.7 Electrical Characteristics
    8. 5.8 Typical Characteristics
  7. Detailed Description
    1. 6.1 Overview
    2. 6.2 Functional Block Diagram
    3. 6.3 Feature Description
      1. 6.3.1  Input Protection Circuitry
      2. 6.3.2  EMI Rejection
      3. 6.3.3  Thermal Protection
      4. 6.3.4  Capacitive Load and Stability
      5. 6.3.5  Common-Mode Voltage Range
      6. 6.3.6  Phase Reversal Protection
      7. 6.3.7  Electrical Overstress
      8. 6.3.8  Overload Recovery
      9. 6.3.9  Typical Specifications and Distributions
      10. 6.3.10 Packages With an Exposed Thermal Pad
      11. 6.3.11 Shutdown
    4. 6.4 Device Functional Modes
  8. Application and Implementation
    1. 7.1 Application Information
    2. 7.2 Typical Applications
      1. 7.2.1 Low-Side Current Measurement
        1. 7.2.1.1 Design Requirements
        2. 7.2.1.2 Detailed Design Procedure
        3. 7.2.1.3 Application Curve
      2. 7.2.2 Buffered Multiplexer
    3. 7.3 Power Supply Recommendations
    4. 7.4 Layout
      1. 7.4.1 Layout Guidelines
      2. 7.4.2 Layout Example
  9. Device and Documentation Support
    1. 8.1 Device Support
      1. 8.1.1 Development Support
        1. 8.1.1.1 TINA-TI (Free Software Download)
    2. 8.2 Documentation Support
      1. 8.2.1 Related Documentation
    3. 8.3 Receiving Notification of Documentation Updates
    4. 8.4 Support Resources
    5. 8.5 Trademarks
    6. 8.6 Electrostatic Discharge Caution
    7. 8.7 Glossary
  10. Revision History
  11. 10Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

Typical Characteristics

at TA = 25°C, VS = ±8V, VCM = VS / 2, RLOAD = 10kΩ (unless otherwise noted)

GUID-20211103-SS0I-N3QT-WZQ2-RGJ9ZQHDC1LP-low.gif
Distribution from 74 amplifiers, TA = 25°C
Figure 5-1 Offset Voltage Production Distribution
GUID-20211103-SS0I-VG1M-HQT0-KTCFLCLTGZXS-low.gif
VCM = V–
Data from 74 amplifiers
Figure 5-3 Offset Voltage vs Temperature
GUID-20211103-SS0I-QR2H-KCVQ-GDRQQGQ2FWXZ-low.gif
TA = 25°C
Data from 74 amplifiers
Figure 5-5 Offset Voltage vs Common-Mode Voltage
GUID-20211103-SS0I-SRTF-LXZD-BVGQ3RGDCFMS-low.svg
TA = 125°C
Data from 74 amplifiers
Figure 5-7 Offset Voltage vs Common-Mode Voltage
GUID-20211103-SS0I-HJP3-S2W3-B0SGZMJBVC0V-low.svg
TA = –40°C
Data from 74 amplifiers
Figure 5-9 Offset Voltage vs Common-Mode Voltage
GUID-20211103-SS0I-97XZ-2CMM-DFZPXNMFTZ8D-low.svg
VCM = V–
Data from 74 amplifiers
Figure 5-11 Offset Voltage vs Power Supply
GUID-20211103-SS0I-PXP2-PPH1-1S7WQC7QSHQN-low.gif
No Load
Figure 5-13 Input Bias Current and Offset Current vs Common-Mode Voltage
GUID-20211103-SS0I-XFNT-S56W-6NVWC8F0R9LG-low.gifFigure 5-15 Slew Rate vs Input Step Voltage
GUID-20211103-SS0I-FN5D-RRVZ-WP6RQHMZLQ69-low.gif
VS = 16V
Figure 5-17 Output Voltage Swing vs Output Current (Sinking)
GUID-20211103-SS0I-40GJ-KJ6K-B4WMHMPGXQRQ-low.gif
VS = 5V
Figure 5-19 Output Voltage Swing vs Output Current (Sinking)
GUID-20211103-SS0I-GPQN-BL8D-1T2BMQJPHGRW-low.gif
VS = 16V, VCM = V–
Figure 5-21 CMRR vs Temperature
GUID-20211103-SS0I-FJV2-MDGR-CJBP2MNFCKBL-low.gif
VS = 2.7V, VCM = V–
Figure 5-23 CMRR vs Temperature
GUID-20211103-SS0I-HTBR-FS8J-PSF45ZPKVK96-low.gifFigure 5-25 0.1Hz to 10Hz Noise
GUID-20211103-SS0I-0PWH-VJDB-M66MWCX8JBM0-low.svg
VCM = V–
Figure 5-27 Quiescent Current vs Supply Voltage
GUID-20211103-SS0I-VPVZ-RD6K-VRMTZ3VH0V78-low.gifFigure 5-29 Open-Loop Voltage Gain vs Temperature (dB)
GUID-20211103-SS0I-DX6H-MQNZ-PTBCBXDNSGFX-low.gif
20-mVpp output step, G = –1
Figure 5-31 Small-Signal Overshoot vs Capacitive Load
GUID-20211103-SS0I-P16X-G7SD-CXHCVBVJ1CBF-low.gif
G = +1
Figure 5-33 Phase Margin vs Capacitive Load
GUID-20211103-SS0I-PFXW-4HQG-QHR90S1SN7NV-low.gif
CL = 20pF, G = –1, 20-mVpp step response
Figure 5-35 Small-Signal Step Response
GUID-20211103-SS0I-RSHP-LKJN-7CRJVQQQR3WX-low.gif
CL = 20pF, G = –1, 5Vpp step response
Figure 5-37 Large-Signal Step Response
GUID-20211103-SS0I-RSRD-6WS7-HMZKC8R3B0SG-low.gifFigure 5-39 Channel Separation vs Frequency
GUID-20211103-SS0I-4VMK-XPGL-X4FKD4TVXFF3-low.gif
Distribution from 74 amplifiers
Figure 5-2 Offset Voltage Drift Distribution
GUID-20211103-SS0I-44TM-41JB-0PWTLVBZLG6W-low.gif
VCM = V+
Data from 74 amplifiers
Figure 5-4 Offset Voltage vs Temperature
GUID-20211103-SS0I-SNXT-XHDS-LCTSLCXQN5FZ-low.gif
TA = 25°C
Data from 74 amplifiers
Figure 5-6 Offset Voltage vs Common-Mode Voltage (Transition Region)
GUID-20211103-SS0I-NVPG-J84W-WNHT6H9PC13S-low.svg
TA = 125°C
Data from 74 amplifiers
Figure 5-8 Offset Voltage vs Common-Mode Voltage (Transition Region)
GUID-20211103-SS0I-X5LB-ZSKB-KNZ6KBPPJKVP-low.svg
TA = –40°C
Data from 74 amplifiers
Figure 5-10 Offset Voltage vs Common-Mode Voltage (Transition Region)
GUID-20211103-SS0I-0MFN-1NTM-MMXQFZ7Q6864-low.gif
 
Figure 5-12 Closed-Loop Gain vs Frequency
GUID-20211103-SS0I-0LFV-VNWV-783HQZ9N5W4V-low.gif
No Load
Figure 5-14 Input Bias Current and Offset Current vs Temperature
GUID-20211103-SS0I-JCBP-0WJP-RJWRND0GQJHN-low.gif
VS = 16V
Figure 5-16 Output Voltage Swing vs Output Current (Sourcing)
GUID-20211103-SS0I-NSZG-DH4K-SNH98TMCLWDV-low.gif
VS = 5V
Figure 5-18 Output Voltage Swing vs Output Current (Sourcing)
GUID-20211103-SS0I-PNZ2-GWLX-WTXHNVQJS0TP-low.gifFigure 5-20 CMRR and PSRR vs Frequency
GUID-20211103-SS0I-H3GJ-MFCZ-5Q8KX8DM88Z3-low.gif
VS = 5V, VCM = V–
Figure 5-22 CMRR vs Temperature
GUID-20211103-SS0I-RQQP-KRHH-BH80SZTNZMGC-low.svgFigure 5-24 PSRR vs Temperature
GUID-20211103-SS0I-5NQC-6GXL-BQTT7KQ2GBBN-low.gifFigure 5-26 Input Voltage Noise Spectral Density vs Frequency
GUID-20211103-SS0I-3LDP-0FPR-GQXSWZGL5W57-low.gif
VCM = V–
Figure 5-28 Quiescent Current vs Temperature
GUID-20211103-SS0I-HZJF-DPTK-6PV2XPDNG1M2-low.gifFigure 5-30 Open-Loop Output Impedance vs Frequency
GUID-20211103-SS0I-R07T-DNQR-PDWFWDSJ9TTZ-low.gif
20-mVpp output step, G = +1
Figure 5-32 Small-Signal Overshoot vs Capacitive Load
GUID-20211103-SS0I-SQZP-VKZL-SKQBTVS61BTW-low.gif
CL = 20pF, G = 1, 20-mVpp step response
Figure 5-34 Small-Signal Step Response
GUID-20211103-SS0I-ZGQR-1PWM-NDLR1HJRRG1X-low.gif
CL = 20pF, G = 1, 5Vpp step response
Figure 5-36 Large-Signal Step Response
GUID-20211104-SS0I-SPLJ-BZT8-24FVD9VTNFXZ-low.svgFigure 5-38 Maximum Output Voltage vs Frequency
GUID-20211103-SS0I-JGRM-GQHC-92QZ8ZGVZGWL-low.gifFigure 5-40 EMIRR (Electromagnetic Interference Rejection Ratio) vs Frequency