SBOSA68D November   2021  – March 2024 TLV9161 , TLV9162 , TLV9164

PRODUCTION DATA  

  1.   1
  2. Features
  3. Applications
  4. Description
  5. Pin Configuration and Functions
  6. Specifications
    1. 5.1 Absolute Maximum Ratings
    2. 5.2 ESD Ratings
    3. 5.3 Recommended Operating Conditions
    4. 5.4 Thermal Information for Single Channel
    5. 5.5 Thermal Information for Dual Channel
    6. 5.6 Thermal Information for Quad Channel
    7. 5.7 Electrical Characteristics
    8. 5.8 Typical Characteristics
  7. Detailed Description
    1. 6.1 Overview
    2. 6.2 Functional Block Diagram
    3. 6.3 Feature Description
      1. 6.3.1  Input Protection Circuitry
      2. 6.3.2  EMI Rejection
      3. 6.3.3  Thermal Protection
      4. 6.3.4  Capacitive Load and Stability
      5. 6.3.5  Common-Mode Voltage Range
      6. 6.3.6  Phase Reversal Protection
      7. 6.3.7  Electrical Overstress
      8. 6.3.8  Overload Recovery
      9. 6.3.9  Typical Specifications and Distributions
      10. 6.3.10 Packages With an Exposed Thermal Pad
      11. 6.3.11 Shutdown
    4. 6.4 Device Functional Modes
  8. Application and Implementation
    1. 7.1 Application Information
    2. 7.2 Typical Applications
      1. 7.2.1 Low-Side Current Measurement
        1. 7.2.1.1 Design Requirements
        2. 7.2.1.2 Detailed Design Procedure
        3. 7.2.1.3 Application Curve
      2. 7.2.2 Buffered Multiplexer
    3. 7.3 Power Supply Recommendations
    4. 7.4 Layout
      1. 7.4.1 Layout Guidelines
      2. 7.4.2 Layout Example
  9. Device and Documentation Support
    1. 8.1 Device Support
      1. 8.1.1 Development Support
        1. 8.1.1.1 TINA-TI (Free Software Download)
    2. 8.2 Documentation Support
      1. 8.2.1 Related Documentation
    3. 8.3 Receiving Notification of Documentation Updates
    4. 8.4 Support Resources
    5. 8.5 Trademarks
    6. 8.6 Electrostatic Discharge Caution
    7. 8.7 Glossary
  10. Revision History
  11. 10Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

Detailed Design Procedure

The transfer function of the circuit in Figure 7-1 is given in Equation 1.

Equation 1. GUID-17BEBAFF-FF05-4E83-9E79-D09B965B56AE-low.gif

The load current (ILOAD) produces a voltage drop across the shunt resistor (RSHUNT). The load current is set from 0A to 1A. To keep the shunt voltage below 100mV at maximum load current, the largest shunt resistor is defined using Equation 2.

Equation 2. GUID-5A4136DA-31E3-4A78-B4DA-7D1DC24F3B0F-low.gif

Using Equation 2, RSHUNT is calculated to be 100mΩ. The voltage drop produced by ILOAD and RSHUNT is amplified by the TLV9161 to produce an output voltage of 0V to 4.9V. The gain needed by the TLV9161 to produce the necessary output voltage is calculated using Equation 3.

Equation 3. GUID-B8885443-1EB3-4DCE-AC8C-E072127B8514-low.gif

Using Equation 3, the required gain is calculated to be 49V/V, which is set with resistors RF and RG. Equation 4 is used to size the resistors, RF and RG, to set the gain of the TLV9161 to 49V/V.

Equation 4. GUID-BDC22054-0F2A-40CF-9AF7-B07F0FD2A2D1-low.gif

Choosing RF as 5.76kΩ, RG is calculated to be 120Ω. RF and RG were chosen as 5.76kΩ and 120Ω because they are standard value resistors that create a 49:1 ratio. Other resistors that create a 49:1 ratio can also be used. However, excessively large resistors will generate thermal noise that exceeds the intrinsic noise of the op amp Figure 7-2 shows the measured transfer function of the circuit shown in Figure 7-1.