SBOSA67B November   2021  – March 2022 TLV9361 , TLV9362 , TLV9364

PRODUCTION DATA  

  1. Features
  2. Applications
  3. Description
  4. Revision History
  5. Pin Configuration and Functions
  6. Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information for Single Channel
    5. 6.5 Thermal Information for Dual Channel
    6. 6.6 Thermal Information for Quad Channel
    7. 6.7 Electrical Characteristics
    8. 6.8 Typical Characteristics
  7. Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 EMI Rejection
      2. 7.3.2 Thermal Protection
      3. 7.3.3 Capacitive Load and Stability
      4. 7.3.4 Electrical Overstress
      5. 7.3.5 Overload Recovery
      6. 7.3.6 Typical Specifications and Distributions
    4. 7.4 Device Functional Modes
  8. Application Information Disclaimer
    1. 8.1 Application Information
    2. 8.2 Typical Applications
      1. 8.2.1 Unity-Gain Buffer With RISO Stability Compensation
        1. 8.2.1.1 Design Requirements
        2. 8.2.1.2 Detailed Design Procedure
        3. 8.2.1.3 Application Curve
  9. Power Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Example
  11. 11Device and Documentation Support
    1. 11.1 Device Support
      1. 11.1.1 Development Support
        1. 11.1.1.1 TINA-TI (Free Software Download)
        2. 11.1.1.2 TI Precision Designs
    2. 11.2 Documentation Support
      1. 11.2.1 Related Documentation
    3. 11.3 Receiving Notification of Documentation Updates
    4. 11.4 Support Resources
    5. 11.5 Trademarks
    6. 11.6 Electrostatic Discharge Caution
    7. 11.7 Glossary
  12. 12Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

Typical Characteristics

at TA = 25°C, VS = ±20 V, VCM = VS / 2, RLOAD = 10 kΩ (unless otherwise noted)

GUID-20211013-SS0I-HW8X-D2BV-ZSFD9NRGQ676-low.gif
Distribution from 74 amplifiers, TA = 25°C
Figure 6-1 Offset Voltage Production Distribution
GUID-20211013-SS0I-RPWZ-KMBS-GVPFQFFPMDX7-low.gif
VCM = V-
Data from 74 amplifiers
Figure 6-3 Offset Voltage vs Temperature
GUID-20211013-SS0I-QCBT-5QCT-TXNVXCCXJJT7-low.gif
TA = 125°C
Data from 74 amplifiers
Figure 6-5 Offset Voltage vs Common-Mode Voltage
GUID-20211013-SS0I-9WKX-FFJG-ZLDPKGZ7KLTM-low.gif
VCM = V–
Data from 74 amplifiers
Figure 6-7 Offset Voltage vs Power Supply
GUID-20211013-SS0I-VS4X-QP9X-SZG1BJVMTXS4-low.gifFigure 6-9 Input Bias Current and Offset Current vs Common-Mode Voltage
GUID-20211013-SS0I-V4FZ-NFVP-RR9XH7JHT62W-low.gif

G = +1, CL = 20 pF

Figure 6-11 Slew Rate vs Input Step Voltage
GUID-20211013-SS0I-5HTR-CJMS-D1M703N5ZBDN-low.gif
VS = 40 V  
Figure 6-13 Output Voltage Swing vs Output Current (Sinking)
GUID-20211013-SS0I-4LXG-X6MH-7WXGKPGT9H1R-low.gif
VS = 5 V
Figure 6-15 Output Voltage Swing vs Output Current (Sinking)
GUID-20211013-SS0I-C6JP-CB5V-DZDHQCS68GVW-low.gif
VS = 40 V
Figure 6-17 CMRR vs Temperature
GUID-20211013-SS0I-V4WZ-ZLQB-F7L5KVGGDPKL-low.gifFigure 6-19 PSRR vs Temperature
GUID-20211006-SS0I-0HD9-7B7B-5W2XVDXLQ6MQ-low.gifFigure 6-21 Input Voltage Noise Spectral Density vs Frequency
GUID-20211018-SS0I-PMFV-DJL8-NWWDPNQ3JSKR-low.gif
VCM = V–
Figure 6-23 Quiescent Current vs Temperature
GUID-20211006-SS0I-TVTS-NL1X-ZRHHSLCKTLDS-low.gifFigure 6-25 Open-Loop Output Impedance vs Frequency
GUID-20211006-SS0I-JW8D-SQSB-QJPSBLL01TPB-low.gif
20-mVpp Output Step, G = +1
Figure 6-27 Small-Signal Overshoot vs Capacitive Load
GUID-20211013-SS0I-0WWC-11CR-S3Q9JT4CBCJD-low.gif
G = –10
Figure 6-29 Positive Overload Recovery
GUID-20211006-SS0I-3VRT-PCCQ-0GHPBLN8F8KH-low.gif
CL = 20 pF, G = 1, 20-mVpp step response
Figure 6-31 Small-Signal Step Response
GUID-20211006-SS0I-3GKD-FTNT-ZHQ5PKTFRBKV-low.gif
CL = 20 pF, G = 1, 5-Vpp step response
Figure 6-33 Large-Signal Step Response
GUID-20211013-SS0I-1VTQ-JFZ8-LGD6P39FGFMZ-low.gifFigure 6-35 Maximum Output Voltage vs Frequency
GUID-20211006-SS0I-RXPX-S6TP-LGS3GP1NJ70H-low.gifFigure 6-37 EMIRR (Electromagnetic Interference Rejection Ratio) vs Frequency
GUID-20211013-SS0I-TWCT-LXNL-JLMZMPPT0LVL-low.gif
Distribution from 74 amplifiers
Figure 6-2 Offset Voltage Drift Distribution
GUID-20211013-SS0I-1TN3-HDPS-KLGK6GBXNMCJ-low.gif
TA = 25°C
Data from 74 amplifiers
Figure 6-4 Offset Voltage vs Common-Mode Voltage
GUID-20211013-SS0I-XTDC-L2FL-KJHH5WP9677X-low.gif
TA = –40°C
Data from 74 amplifiers
Figure 6-6 Offset Voltage vs Common-Mode Voltage
GUID-20211006-SS0I-T0P6-QDM9-DB8RFWKQJ68R-low.gifFigure 6-8 Closed-Loop Gain vs Frequency
GUID-20211013-SS0I-9LQR-K01K-MPNDN8V5G0B2-low.gifFigure 6-10 Input Bias Current and Offset Current vs Temperature
GUID-20211013-SS0I-0GHH-X7WX-RJR6GNQJDQK2-low.gif
VS = 40 V
Figure 6-12 Output Voltage Swing vs Output Current (Sourcing)
GUID-20211013-SS0I-6QNL-V71Z-HVKC2WSH1JXG-low.gif
VS = 5 V
Figure 6-14 Output Voltage Swing vs Output Current (Sourcing)
GUID-20211006-SS0I-9PWC-FZ1L-RHJBDLTCCZWV-low.gif
 
Figure 6-16 CMRR and PSRR vs Frequency
GUID-20211013-SS0I-GFHB-RGKH-K4T5PJ7HWFPM-low.gif
VS = 5 V
Figure 6-18 CMRR vs Temperature
GUID-20211006-SS0I-8LWQ-CXQ5-TVSZKGSGVRM8-low.gifFigure 6-20 0.1-Hz to 10-Hz Noise
GUID-20211013-SS0I-BZVC-GKBR-DN6FNSSZ4CFT-low.gif
VCM = V–
Figure 6-22 Quiescent Current vs Supply Voltage
GUID-20211013-SS0I-RQRK-SQRW-TP0QXKR1RZXS-low.gifFigure 6-24 Open-Loop Voltage Gain vs Temperature (dB)
GUID-20211006-SS0I-XPVF-BZGZ-BZZDH8BGFCC6-low.gif
20-mVpp Output Step, G = -1
Figure 6-26 Small-Signal Overshoot vs Capacitive Load
GUID-20211006-SS0I-MG0M-X7TR-WSLP8CZLSP4C-low.gif
G = +1
Figure 6-28 Phase Margin vs Capacitive Load
GUID-20211013-SS0I-PPLH-KZZW-B87WPQ043CNN-low.gif
G = –10
Figure 6-30 Negative Overload Recovery
GUID-20211014-SS0I-T2K2-6RNT-W42M71DDDC4C-low.gif
CL = 20 pF, G = -1, 20-mVpp step response
Figure 6-32 Small-Signal Step Response
GUID-20211014-SS0I-NRPD-67JN-HXTLX1SWV6RT-low.gif
CL = 20 pF, G = -1, 5-Vpp step response
Figure 6-34 Large-Signal Step Response
GUID-20211006-SS0I-XBVX-NRGX-ZBRBDCGMNKP0-low.gifFigure 6-36 Channel Separation vs Frequency