SLVSH63 February   2023 TLVM13610

PRODUCTION DATA  

  1. Features
  2. Applications
  3. Description
  4. Revision History
  5. Device Comparison Table
  6. Pin Configuration and Functions
  7. Specifications
    1. 7.1 Absolute Maximum Ratings
    2. 7.2 ESD Ratings
    3. 7.3 Recommended Operating Conditions
    4. 7.4 Thermal Information
    5. 7.5 Electrical Characteristics
    6. 7.6 System Characteristics
    7. 7.7 Typical Characteristics
  8. Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1  Input Voltage Range (VIN1, VIN2)
      2. 8.3.2  Adjustable Output Voltage (FB)
      3. 8.3.3  Input Capacitors
      4. 8.3.4  Output Capacitors
      5. 8.3.5  Switching Frequency (RT)
      6. 8.3.6  Precision Enable and Input Voltage UVLO (EN)
      7. 8.3.7  Power-Good Monitor (PG)
      8. 8.3.8  Adjustable Switch-Node Slew Rate (RBOOT, CBOOT)
      9. 8.3.9  Bias Supply Regulator (VCC, VLDOIN)
      10. 8.3.10 Overcurrent Protection (OCP)
      11. 8.3.11 Thermal Shutdown
    4. 8.4 Device Functional Modes
      1. 8.4.1 Shutdown Mode
      2. 8.4.2 Standby Mode
      3. 8.4.3 Active Mode
  9. Applications and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Applications
      1. 9.2.1 Design 1 – High-Efficiency 8-A (10-A peak) Synchronous Buck Regulator for Industrial Applications
        1. 9.2.1.1 Design Requirements
        2. 9.2.1.2 Detailed Design Procedure
          1. 9.2.1.2.1 Custom Design with WEBENCH® Tools
          2. 9.2.1.2.2 Output Voltage Setpoint
          3. 9.2.1.2.3 Switching Frequency Selection
          4. 9.2.1.2.4 Input Capacitor Selection
          5. 9.2.1.2.5 Output Capacitor Selection
          6. 9.2.1.2.6 Other Connections
        3. 9.2.1.3 Application Curves
    3. 9.3 Power Supply Recommendations
    4. 9.4 Layout
      1. 9.4.1 Layout Guidelines
        1. 9.4.1.1 Thermal Design and Layout
      2. 9.4.2 Layout Example
  10. 10Device and Documentation Support
    1. 10.1 Device Support
      1. 10.1.1 Third-Party Products Disclaimer
      2. 10.1.2 Development Support
        1. 10.1.2.1 Custom Design with WEBENCH® Tools
    2. 10.2 Documentation Support
      1. 10.2.1 Related Documentation
    3. 10.3 Receiving Notification of Documentation Updates
    4. 10.4 Support Resources
    5. 10.5 Trademarks
    6. 10.6 Electrostatic Discharge Caution
    7. 10.7 Glossary
  11. 11Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

System Characteristics

The following specifications apply only to the typical applications circuit, with nominal component values. Specifications in the typical (TYP) column apply to TJ = 25°C only. These specifications are not ensured by production testing.
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
SUPPLY
IIN Input supply current when in regulation VIN = VEN/SYNC = 24 V, VOUT = VVLDOIN = 3.3 V, VMODE = 0 V, FSW = 1 MHz, IOUT = 0 A 8 µA
OUTPUT VOLTAGE
ΔVOUT1 Load regulation VOUT = 3.3 V, VIN = 24 V, IOUT = 0.1 A to 8 A 4 mV
ΔVOUT2 Line regulation VOUT = 3.3 V, VIN = 4 V to 36 V, IOUT = 8 A 1 mV
ΔVOUT3 Load transient VOUT = 5 V, VIN = 24 V, IOUT = 0 A to 4 A at 1 A/μs, COUT(derated) = 100 μF 150 mV
EFFICIENCY
η Efficiency VIN = 12 V, VOUT = VVLDOIN = 3.3 V, IOUT = 4 A, FSW = 1 MHz 92.1
%

η Efficiency VIN = 24 V, VOUT = VVLDOIN = 3.3 V, IOUT = 4 A, FSW = 1 MHz 91
%

η Efficiency VIN = 12 V, VOUT = VVLDOIN = 5 V, IOUT = 4 A, FSW = 1 MHz 94.3
%

η Efficiency VIN = 24 V, VOUT = VVLDOIN = 5 V, IOUT = 4 A, FSW = 1 MHz 93
%