SLVSHP0 July 2024 TLVM14404 , TLVM14406
PRODUCTION DATA
The TLVM1440x requires a minimum input capacitance of 4 × 10µF ceramic, preferably with X7R dielectric. The voltage rating of input capacitors must be greater than the maximum input voltage. For this design, select four 10µF, X7R, 50V, 0805 case size, ceramic capacitors connected from VIN1 and VIN2 to PGND as close as possible to the module. See Figure 8-24 for recommended layout placement.