SLYS045B June 2021 – July 2024 TMAG5273
PRODUCTION DATA
Refer to the PDF data sheet for device specific package drawings
Figure 6-9 and Figure 6-10 show examples of standard I2C three byte read command supported by the TMAG5273. The starting byte contains 7-bit secondary device address and the R/W command bit 0. The MSB of the second byte contains the conversion trigger command bit. Write 1 at this trigger bit to start a new conversion after the register address decoding is completed. The seven LSB bits of the second byte contains the starting register address for the write command. After receiving ACK signal from secondary, the primary send the secondary address once again with R/W command bit as 1. The secondary starts to send the corresponding register data, and sends successive register data with each successive ACK from the primary. If CRC is enabled, the secondary sends the fifth CRC byte based off the CRC calculation of immediate past four register bytes.