SLLSF57A August 2022 – April 2024 TMDS1204
PRODUCTION DATA
For further programmability, the TMDS1204 can be controlled using I2C. The SCL/CFG0 and SDA/CFG1 terminals are used for I2C clock and I2C data respectively.
ADDR/EQ0 pin | Bit 7 (MSB) | Bit 6 | Bit 5 | Bit 4 | Bit 3 | Bit 2 | Bit 1 | Bit 0 (W/R) | HEX |
---|---|---|---|---|---|---|---|---|---|
0 | 1 | 0 | 1 | 1 | 1 | 1 | 0 | 0/1 | BC/BD |
R | 1 | 0 | 1 | 1 | 1 | 0 | 1 | 0/1 | BA/BB |
F | 1 | 0 | 1 | 1 | 1 | 0 | 0 | 0/1 | B8/B9 |
1 | 1 | 0 | 1 | 1 | 0 | 1 | 1 | 0/1 | B6/B7 |