SNIS209C July   2021  – June 2022 TMP126

PRODUCTION DATA  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Revision History
  5. 5 Device Comparison
  6. 6 Pin Configuration and Functions
  7. 7 Specifications
    1. 7.1 Absolute Maximum Ratings
    2. 7.2 ESD Ratings
    3. 7.3 Recommended Operating Conditions
    4. 7.4 Thermal Information
    5. 7.5 Electrical Characteristics
    6. 7.6 SPI Interface Timing
    7. 7.7 Timing Diagram
    8. 7.8 Typical Characteristics
  8. 8 Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Descriptions
      1. 8.3.1 Temperature Limits
      2. 8.3.2 Slew Rate Warning
      3. 8.3.3 Cyclic Redundancy Check (CRC)
      4. 8.3.4 NIST Traceability
      5. 8.3.5 Fast Measurement Intervals With No Self-Heating Concerns
    4. 8.4 Device Functional Modes
      1. 8.4.1 Continuous Conversion Mode
      2. 8.4.2 Shutdown Mode
      3. 8.4.3 One-Shot Mode
      4. 8.4.4 Interrupt and Comparator Mode
        1. 8.4.4.1 Interrupt Mode
        2. 8.4.4.2 Comparator Mode
    5. 8.5 Programming
      1. 8.5.1 Temperature Data Format
      2. 8.5.2 Serial Bus Interface
        1. 8.5.2.1 Command Word Structure
          1. 8.5.2.1.1 Don't Care
          2. 8.5.2.1.2 CRC Enable
          3. 8.5.2.1.3 CRC Data Block Length
          4. 8.5.2.1.4 Auto Increment
          5. 8.5.2.1.5 Read/Write
          6. 8.5.2.1.6 Sub-Address
        2. 8.5.2.2 Communication
        3. 8.5.2.3 Write Operations
        4. 8.5.2.4 Read Operations
        5. 8.5.2.5 Cyclic Redundancy Check (CRC)
          1. 8.5.2.5.1 Cyclic Redundancy Check Implementation
    6. 8.6 Register Map
  9. 9 Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Application
      1. 9.2.1 Design Requirements
      2. 9.2.2 Detailed Design Procedure
      3. 9.2.3 Application Curve
  10. 10Power Supply Recommendations
  11. 11Layout
    1. 11.1 Layout Guidelines
    2. 11.2 Layout Example
  12. 12Device and Documentation Support
    1. 12.1 Documentation Support
      1. 12.1.1 Related Documentation
    2. 12.2 Receiving Notification of Documentation Updates
    3. 12.3 Support Resources
    4. 12.4 Trademarks
    5. 12.5 Electrostatic Discharge Caution
    6. 12.6 Glossary
  13. 13Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

8.4.4.1 Interrupt Mode

When the INT_COMP bit in the Configuration register is set to 0, the device is in interrupt mode. Changing the device to Interrupt mode from Comparator mode will immediately clear the Alert_Status register and reset the ALERT pin. The TMP126 will then behave as described in this section at the next temperature conversion. In this mode, the device compares the temperature result at the end of every conversion with the values in the TLow_Limit register and THigh_Limit register. If the temperature result is higher the value in the THigh_Limit register, the THigh_Status and THigh_Flag bits in the Alert_Status register will be set and the ALERT pin will assert. After a read of the Alert_Status register the flag bit will clear and the ALERT pin will de-assert. Subsequent temperature results above the hysteresis value (THigh_Limit - THigh_Hysteresis), where THigh_Hysteresis is the Most Significant Byte (MSB) in the Hysteresis register, will not set the THigh_Flag bit. The status bit will not clear until a temperature result is below (THigh_Limit - THigh_Hysteresis).

After a temperature result below (THigh_Limit - THigh_Hysteresis), the THigh_Status bit will clear, the THigh_Flag bit will be set, and the ALERT pin will be asserted to indicate the change.

If the THigh_Flag bit is not enabled in the Alert_Enable register, the flag bit will be set when the measured temperature crosses the THigh_Limit or hysteresis but the ALERT pin will not assert. The behavior for the TLow_Limit and Slew rate will be the same as the previously described high limit. Figure 8-7 shows a diagram depicting the behavior.

GUID-D787CC26-D5A4-4478-8852-8DAA7E89BFF8-low.gifFigure 8-7 Interrupt Mode Diagram