SBOS760B November 2015 – April 2017 TMP275-Q1
PRODUCTION DATA.
MIN | MAX | UNIT | |
---|---|---|---|
Power supply, V+ | 7 | V | |
Input voltage(2) | –0.5 | 7 | V |
Input current | 10 | mA | |
Operating temperature | –55 | 127 | °C |
Junction temperature, TJ max | 150 | °C | |
Storage temperature, Tstg | –60 | 130 | °C |
VALUE | UNIT | |||
---|---|---|---|---|
V(ESD) | Electrostatic discharge | Human-body model (HBM), per AEC Q100-002(1) | ±2500 | V |
Charged-device model (CDM), per AEC Q100-011 | ±1000 |
MIN | NOM | MAX | UNIT | |
---|---|---|---|---|
Supply voltage | 2.7 | 5.5 | V | |
Operating free-air temperature, TA | –40 | 125 | °C |
THERMAL METRIC(1) | TMP275-Q1 | UNIT | ||
---|---|---|---|---|
D (SOIC) | DGK (VSSOP) | |||
8 PINS | 8 PINS | |||
RθJA | Junction-to-ambient thermal resistance | 121.6 | 185 | °C/W |
RθJC(top) | Junction-to-case (top) thermal resistance | 70.5 | 76.1 | °C/W |
RθJB | Junction-to-board thermal resistance | 62 | 106.4 | °C/W |
ψJT | Junction-to-top characterization parameter | 23 | 14.1 | °C/W |
ψJB | Junction-to-board characterization parameter | 61.5 | 104.8 | °C/W |
PARAMETER | TEST CONDITIONS | MIN | TYP | MAX | UNIT | ||
---|---|---|---|---|---|---|---|
TEMPERATURE INPUT | |||||||
Range | –40 | 125 | °C | ||||
Accuracy (temperature error) | –10°C to 85°C, V+ = 3.3 V | ±0.125 | ±0.75 | °C | |||
0°C to 100°C, V+ = 3 V to 3.6 V | ±0.125 | ±1 | |||||
–40°C to 125°C, V+ = 3 V to 3.6 V | ±0.125 | ±1.5 | |||||
25°C to 100°C, V+ = 3.3 V to 5.5 V | ±0.2 | ±2 | |||||
Resolution(1) | Selectable | 0.0625 | °C | ||||
DIGITAL INPUT/OUTPUT | |||||||
Input capacitance | 3 | pF | |||||
VIH | High-level input logic | 0.7 (V+) | 6 | V | |||
VIL | Low-level input logic | –0.5 | 0.3 (V+) | V | |||
IIN | Leakage input current | 0 V ≤ VIN ≤ 6 V | 1 | µA | |||
Input voltage hysteresis | SCL and SDA pins | 500 | mV | ||||
VOL | Low-level output logic | SDA | IOL = 3 mA | 0 | 0.15 | 0.4 | V |
ALERT | IOL = 4 mA | 0 | 0.15 | 0.4 | |||
Resolution | Selectable | 9 to 12 | Bits | ||||
Conversion time | 9 bits | 27.5 | 37.5 | ms | |||
10 bits | 55 | 75 | |||||
11 bits | 110 | 150 | |||||
12 bits | 220 | 300 | |||||
Time-out time | 25 | 54 | 74 | ms | |||
POWER SUPPLY | |||||||
Operating range | 2.7 | 5.5 | V | ||||
IQ | Quiescent current | Serial bus inactive | 50 | 85 | µA | ||
Serial bus active, SCL frequency = 400 kHz | 100 | ||||||
Serial bus active, SCL frequency = 3.4 MHz | 410 | ||||||
ISD | Shutdown current | Serial bus inactive | 0.1 | 3 | µA | ||
Serial bus active, SCL frequency = 400 kHz | 60 | ||||||
Serial bus active, SCL frequency = 3.4 MHz | 380 | ||||||
TEMPERATURE RANGE | |||||||
Specified range | –40 | 125 | °C | ||||
Operating range | –55 | 127 | °C |
FAST MODE | HIGH-SPEED MODE | UNIT | |||||
---|---|---|---|---|---|---|---|
MIN | MAX | MIN | MAX | ||||
ƒ(SCL) | SCL operating frequency | V+ | 0.001 | 0.4 | 0.001 | 2.38 | MHz |
t(BUF) | Bus-free time between STOP and START condition | See the Timing Diagrams section | 1300 | 160 | ns | ||
t(HDSTA) | Hold time after repeated START condition. After this period, the first clock is generated. |
600 | 160 | ns | |||
t(SUSTA) | repeated start condition setup time | 600 | 160 | ns | |||
t(SUSTO) | STOP condition setup time | 600 | 160 | ns | |||
t(HDDAT) | Data hold time | 4 | 900 | 4 | 120 | ns | |
t(SUDAT) | Data setup time | 100 | 10 | ns | |||
t(LOW) | SCL-clock low period | V+ , see the Timing Diagrams section | 1300 | 280 | ns | ||
t(HIGH) | SCL-clock high period | See the Timing Diagrams section | 600 | 60 | ns | ||
tFD | Data fall time | See the Timing Diagrams section | 300 | 150 | ns | ||
tRC | Clock rise time | See the Two-Wire Timing Diagrams section | 300 | 40 | ns | ||
SCLK ≤ 100 kHz, see the Timing Diagrams section | 1000 | ns | |||||
tFC | Clock fall time | See the Two-Wire Timing Diagrams section | 300 | 40 | ns |
Serial bus inactive | ||
12-bit resolution | ||