SBOS921F
December 2018 – November 2023
TMP61
PRODUCTION DATA
1
1
Features
2
Applications
3
Description
4
Device Comparison
5
Pin Configuration and Functions
6
Specifications
6.1
Absolute Maximum Ratings
6.2
ESD Ratings
6.3
Recommended Operating Conditions
6.4
Thermal Information
6.5
Electrical Characteristics
6.6
Typical Characteristics
7
Detailed Description
7.1
Overview
7.2
Functional Block Diagram
7.3
Feature Description
7.3.1
TMP61 R-T table
7.3.2
Linear Resistance Curve
7.3.3
Positive Temperature Coefficient (PTC)
7.3.4
Built-In Fail Safe
7.4
Device Functional Modes
8
Application and Implementation
8.1
Application Information
8.2
Typical Application
8.2.1
Thermistor Biasing Circuits
8.2.1.1
Design Requirements
8.2.1.2
Detailed Design Procedure
8.2.1.2.1
Thermal Protection With Comparator
8.2.1.2.2
Thermal Foldback
8.2.1.3
Application Curve
8.3
Power Supply Recommendations
8.4
Layout
8.4.1
Layout Guidelines
8.4.2
Layout Example
9
Device and Documentation Support
9.1
Receiving Notification of Documentation Updates
9.2
Support Resources
9.3
Trademarks
9.4
Glossary
9.5
Electrostatic Discharge Caution
10
Revision History
11
Mechanical, Packaging, and Orderable Information
Package Options
Mechanical Data (Package|Pins)
DYA|2
MPSS124A
DEC|2
MPSS112
LPG|2
MPBC004A
Thermal pad, mechanical data (Package|Pins)
Orderable Information
sbos921f_oa
sbos921f_pm
8.2.1
Thermistor Biasing Circuits
Figure 8-1
Voltage Biasing Circuit With Linear Thermistor
Figure 8-3
Voltage Biasing Circuit With Non-Linear Thermistor
Figure 8-2
Current Biasing Circuit With Linear Thermistor
Figure 8-4
Current Biasing Circuit With Non-Linear Thermistor