SBOS721B October 2014 – October 2024 TMP75B-Q1
PRODUCTION DATA
The TMP75B-Q1 is two-wire and SMBus compatible. Figure 7-2 to Figure 7-5 describe the various operations on the TMP75B-Q1. Parameters for Figure 7-2 are defined in Section 6.6. Bus definitions are:
The receiver acknowledges the transfer of data. Using the TMP75B-Q1 for single-byte updates is also possible. To update only the MS byte, terminate communication by issuing a start or stop condition on the bus.
A device that acknowledges must pull down the SDA line during the acknowledge clock pulse so that the SDA line is stable low during the high period of the acknowledge clock pulse. Setup and hold times must be taken into account. When a controller receives data, the termination of the data transfer can be signaled by the controller generating a not-acknowledge (1) on the last byte transmitted by the target.