SLDS153B May   2009  – November 2015 TMP815

PRODUCTION DATA.  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Revision History
  5. 5 Pin Configuration and Functions
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Typical Characteristics
  7. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Speed Control
      2. 7.3.2 Soft-Start
      3. 7.3.3 Lock Detection
      4. 7.3.4 Current Limit
      5. 7.3.5 Minimum Speed Setting
      6. 7.3.6 Speed Output
      7. 7.3.7 Drive Frequency Selection
    4. 7.4 Device Functional Modes
  8. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
      3. 8.2.3 Application Curves
  9. 9 Power Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Example
  11. 11Device and Documentation Support
    1. 11.1 Community Resource
    2. 11.2 Trademarks
    3. 11.3 Electrostatic Discharge Caution
    4. 11.4 Glossary
  12. 12Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

5 Pin Configuration and Functions

PW Package
16-Pin TSSOP
Top View
TMP815 pinout_lds153.gif

Pin Functions

PIN I/O DESCRIPTION
NAME NO.
OUT2P 1 O Upper-side driver output
OUT2N 2 O Lower-side driver output
VCC 3 Power supply
For the power stabilization capacitor on the signal side (see *2 in Figure 5), use the capacitance of 1 μF or more. Connect VCC and GND with a thick and short pattern.
For the power stabilization capacitor on the power side (see *3 in Figure 5), use the capacitance of 1 μF or more. Connect the power supply on the power side and GND with a thick and short pattern.
SENSE 4 I Current limiting detection (see *8 in Figure 5)
When the pin voltage exceeds 0.2 V, the current is limited, and the operation enters the lower regeneration mode. Connect to GND if not used.
RMI 5 I Minimum speed setting (see *6 in Figure 5)
If the device power supply is likely to be turned off first when the pin is used with external power supply, insert a current limiting resistor to prevent inflow of large current (also applies to VTH terminal). Connect to 5VREG with a pullup resistor if not used.
VTH 6 I Speed control (see *7 in Figure 5)
For control with pulse input, insert a current limiting resistor and use the pin with a frequency of 20 kHz to 100 kHz (TI recommends 20 kHz to 50 kHz). For the control method, see Figure 2. Connect to GND if not used (at full speed).
CPWM 7 O Connection to capacitor for generation of PWM basic frequency (see *5 in Figure 5)
CP = 220 pF causes oscillation at f = 30 kHz, which is the basic frequency of PWM. As this is also used for the current limiting canceling signal, be sure to connect the capacitor even when speed control is not used.
FG 8 O Rotation speed detection pin (see *9 in Figure 5)
This is an open-collector output, which can detect the rotation speed from the FG output according to the phase change over. Keep this pin open when not used.
IN– 9 I Hall input (see *4 in Figure 5)
IN+ 10 I Hall input. Make connecting traces as short as possible to prevent carrying of noise. To further limit noise, insert a capacitor between IN+ and IN–. The Hall input circuit is a comparator having a hysteresis of 15 mV. Also includes a soft-switch section with ±30-mV input-signal differential voltage. TI recommends that the Hall input level is a minimum of 100 mVp-p.
CT 11 O Connection to the lock detection capacitor (see *10 in Figure 5)
The constant current charge and discharge circuits cause locking when the pin voltage rises to 3 V and unlocking when pin voltage falls to 1.1 V. Connect to GND when not used (when locking is not necessary).
S-S 12 I Connection to the soft-start setting capacitor (see *11 in Figure 5)
Connect the capacitor between S-S and 5VREG to set the soft-start time, according to the capacitance that is chosen (see Figure 3 and Figure 4). Connect to GND when not used.
5VREG 13 O 5-V regulator output
SGND 14 System ground (see *1 in Figure 5)
Connection to the control-circuit power-supply system
OUT1N 15 O Lower-side driver output
OUT1P 16 O Upper-side driver output