6.3.1 Power Domains
The device has several power domains that can be turned on for operation or off to minimize power dissipation. The global power/sleep controller (GPSC) is used to control the power gating of various power domains.
Table 6-5 shows the C665x power domains.
Table 6-5 Power Domains
DOMAIN |
BLOCK(S) |
NOTE |
POWER CONNECTION |
0 |
Most peripheral logic |
Cannot be disabled |
Always on |
1 |
Per-core TETB and System TETB |
RAMs can be powered down |
Software control |
2 |
Reserved |
Reserved |
Reserved |
3 |
PCIe |
Logic can be powered down |
Software control |
4 |
SRIO |
Logic can be powered down |
Software control |
5 |
HyperLink |
Logic can be powered down |
Software control |
6 |
Reserved |
Reserved |
Reserved |
7 |
MSMC RAM |
MSMC RAM can be powered down |
Software control |
8 |
Reserved |
Reserved |
Reserved |
9 |
Reserved |
Reserved |
Reserved |
10 |
Reserved |
Reserved |
Reserved |
11 |
TCP3d |
RAMs can be powered down |
Software control |
12 |
VCP2_B |
RAMs can be powered down |
Software control |
13 |
C66x Core 0, L1/L2 RAMs |
L2 RAMs can sleep |
Software control through C66x CorePac. For details, see the C66x CorePac Reference Guide. |
14 |
C66x Core 1, L1/L2 RAMs (C6657 only) |
L2 RAMs can sleep |
Software control through C66x CorePac. For details, see the C66x CorePac Reference Guide. |
15 |
Reserved |
Reserved |
Reserved |