SPRSP45C March 2020 – April 2024 TMS320F280021 , TMS320F280021-Q1 , TMS320F280023 , TMS320F280023-Q1 , TMS320F280023C , TMS320F280025 , TMS320F280025-Q1 , TMS320F280025C , TMS320F280025C-Q1
PRODUCTION DATA
The Memory Map table describes the memory map. See the Memory Controller Module section of the System Control chapter in the TMS320F28002x Real-Time Microcontrollers Technical Reference Manual.
MEMORY | SIZE | START ADDRESS | END ADDRESS | HIC ACCESS | DMA ACCESS | ECC/ PARITY | ACCESS PROTECTION | SECURITY |
---|---|---|---|---|---|---|---|---|
M0 RAM | 1K x 16 | 0x0000 0000 | 0x0000 03FF | - | - | ECC | Yes | - |
M1 RAM | 1K x 16 | 0x0000 0400 | 0x0000 07FF | - | - | ECC | Yes | - |
PieVectTable | 512 x 16 | 0x0000 0D00 | 0x0000 0EFF | - | - | - | - | - |
LS4 RAM | 2K x 16 | 0x0000 A000 | 0x0000 A7FF | - | - | ECC | Yes | Yes |
LS5 RAM | 2K x 16 | 0x0000 A800 | 0x0000 AFFF | - | - | ECC | Yes | Yes |
LS6 RAM | 2K x 16 | 0x0000 B000 | 0x0000 B7FF | - | - | ECC | Yes | Yes |
LS7 RAM | 2K x 16 | 0x0000 B800 | 0x0000 BFFF | - | - | ECC | Yes | Yes |
GS0 RAM | 2K x 16 | 0x0000 C000 | 0x0000 C7FF | Yes | Yes | Parity | Yes | - |
CAN A Message RAM | 2K x 16 | 0x0004 9000 | 0x0004 97FF | - | - | Parity | - | - |
TI OTP(1) | 1K x 16 | 0x0007 0000 | 0x0007 03FF | - | - | ECC | - | - |
User OTP | 1K x 16 | 0x0007 8000 | 0x0007 83FF | - | - | ECC | - | Yes |
Flash | 64K x 16 | 0x0008 0000 | 0x0008 FFFF | - | - | ECC | - | Yes |
Secure ROM | 32K x 16 | 0x003E 8000 | 0x003E FFFF | - | - | Parity | - | Yes |
Boot ROM | 64K x 16 | 0x003F 0000 | 0x003F FFFF | - | - | Parity | - | - |
Pie Vector Fetch Error (part of Boot ROM) | 1 x 16 | 0x003F FFBE | 0x003F FFBF | - | - | Parity | - | - |
Default Vectors (part of Boot ROM) | 64 x 16 | 0x003F FFC0 | 0x003F FFFF | - | - | Parity | - | - |